MICROCONTROLLER WAVEFORM GENERATION

• US 20090254691A1
• Filed: 08/22/2006
• Published: 10/08/2009
• Est. Priority Date: 08/22/2005
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Goodhue, Greg, Khan, Ata, Shrivastava, Pankaj
• Granted Patent: US 7,945,718 B2
• Time in Patent Office: Days
• US Class Current: 710/305
• CPC Class Codes: G06F 1/0321 Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers G06F1/0314, G06F1/035 take precedence
• CPC Class Codes: G06F 15/7842 on one IC chip (single chip microcontrollers)

Abstract

One embodiment of the present invention is a microcontroller (24) including an embedded memory (42), waveform control circuitry (44) operatively coupled to the memory (42), several terminals (52), and a programmable processor (30). Processor (30) is responsive to execution of the first sequence of instructions to store a waveform bit pattern in memory (42) with a desired transmission timing. Waveform circuitry (44) is responsive to processor (30) to control transmission of the waveform bit pattern stored in memory (42) through one or more of the terminals (52) in accordance with the timing while processor (30) executes the second sequence of instructions to perform a different process.

Claims

1. A method, comprising:

providing a microcontroller integrated circuit including a programmable processor, an embedded memory operatively coupled to the processor, waveform control circuitry operatively coupled to the processor and the memory, and several terminals each structured for coupling to the microcontroller integrated circuit;

in accordance with programming executed by the processor, storing a waveform bit pattern in the memory;

with the waveform circuitry, controlling transmission of the waveform bit pattern stored in the memory through one or more of the terminals external to the microcontroller integrated circuit in accordance with desired synchronous timing; and

during the transmission, executing an instruction sequence for a different process with the processor.

2. The method of claim 1, wherein the processor, the memory, and the waveform circuitry are coupled to a common bus.

3. The method of claim 1, which includes initiating the transmission with the waveform control circuitry in response to the processor.

4. The method of claim 1, which includes repeating the transmission of the waveform bit in response to the programming executed by the processor.

5. The method of claim 1, wherein the different process includes servicing an interrupt with the processor.

6. The method of claim 1, which includes selecting the one or more of the output terminals in accordance with a value stored in one or more registers by the processor.

7. The method of claim 1, wherein the terminals are provided as general purpose input/output pins, which includes selectively switching each of the input/output pins between the memory and one or more other embedded devices.

8. The method of claim 1, which includes controlling input of information into the microcontroller integrated circuit from a circuit device external to the microcontroller integrated circuit in response to the transmission of the waveform bit pattern.

9. Apparatus, comprising:

a microcontroller integrated circuit device including;

an embedded memory;

waveform control circuitry operatively coupled to the memory;

several terminals each structured to provide a connection external to the microcontroller integrated circuit; and

a programmable processor responsive to execution of a first sequence of instructions to store a waveform bit pattern in the embedded memory with a desired transmission timing, the waveform circuitry being responsive to the programmable processor to control synchronous transmission of the waveform bit pattern stored in the memory through one or more of the terminals in accordance with the desired timing while the processor executes a second sequence of instructions to perform a different process with the processor.

10. The apparatus of claim 9, wherein the processor, the memory, and the waveform control circuitry are coupled to a common bus.

11. The apparatus of claim 9, wherein the terminals are each a shared general input/output pin and the microcontroller integrated circuit includes one or more other embedded devices and one or more registers operable to selectively switch each of the terminals between the memory and the one or more other embedded devices.

12. The apparatus of claim 9, wherein the waveform control circuitry includes a timer synchronized to instruction execution by the processor.

13. The apparatus of claim 9, wherein the microcontroller integrated circuit includes means for servicing an interrupt during performance of the different process.

14. The apparatus of claim 9, further comprising an external circuit device connected to the one or more terminals of the microcontroller integrated circuit and the microcontroller integrated circuit, including means for receiving input data from the circuit device in response to the waveform bit pattern.

15. A method, comprising:

providing a microcontroller integrated circuit including a programmable processor, an embedded memory operatively coupled to the processor, waveform control circuitry operatively coupled to the processor and the memory, and several input/output pins, the input/output pins each being structured to be selectively switched between the memory and at least one different embedded device; and

executing a first instruction sequence with the processor;

in response to the executing of the first instruction sequence, the waveform circuitry initiating transmission of a waveform bit pattern stored in the memory through one or more of the input/output pins and controlling timing of the transmission; and

executing a second instruction sequence with the processor during the transmission, the transmission being under control of the waveform circuitry.

16. The method of claim 15, which includes repeating the transmission of the waveform bit pattern during the executing of the second instruction sequence.

17. The method of claim 15, wherein the executing of the second instruction sequence includes servicing an interrupt with the processor.

18. The method of claim 15, which includes selecting the one or more of the input/output pins in accordance with a value stored in a register by the processor.

19. The method of claim 15, which includes controlling input of information into the microprocessor from a circuit device external to the microcontroller integrated circuit in response to the transmission of the waveform bit pattern.

20. Apparatus, comprising:

a microcontroller integrated circuit device including;

an embedded memory;

waveform control circuitry operatively coupled to the memory;

several input/output pins, the input/output pins being structured to each be selectively switched between the memory and at least one different embedded device; and

a programmable processor including means for executing a first sequence of instructions to store a waveform bit pattern in the embedded memory and designate timing for the waveform bit pattern; and

wherein the waveform circuitry includes means for controlling synchronous transmission of the waveform bit pattern stored in the memory through one or more of the input/output pins in accordance with the timing while the processor executes a second sequence of instructions to perform a different process with the processor.