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Low switching current MTJ element for ultra-high STT-RAM and a method for making the same

  • US 20090256220A1
  • Filed: 04/09/2008
  • Published: 10/15/2009
  • Est. Priority Date: 04/09/2008
  • Status: Active Grant
First Claim
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1. A MTJ nanopillar structure in a STT-RAM device, comprising:

  • (a) a first stack of layers with sidewalls formed on a bottom electrode and having a thickness in a direction perpendicular to said bottom electrode and a first shape with a first area in a plane orthogonal to said thickness direction, comprising;

    (1) a seed layer on the bottom electrode;

    (2) a composite reference magnetic layer formed on the seed layer and comprised of at least one magnetic layer and an insertion layer that induces a high damping constant in said at least one magnetic layer, and wherein the at least one magnetic layer with a high damping constant is a reference layer in a “

    self-pinned”

    state with a first thickness and a magnetization direction along an easy axis direction in a plane orthogonal to said thickness direction; and

    (3) a tunnel barrier layer on the “

    self-pinned”

    reference magnetic layer(b) a second stack of layers with sidewalls formed on the first stack of layers and having a thickness in a direction perpendicular to said bottom electrode and a second shape with a second area substantially less than the first area in a plane orthogonal to said thickness direction;

    comprising(1) a composite free layer having a FM1/NCC/FM2 configuration wherein NCC is a nanocurrent channel layer comprised of R(Si) grains formed in an oxide or nitride insulator matrix and R is Fe, Ni, Co, or B, and the FM1 and FM2 layers are magnetic layers having a low damping constant and a combined thickness substantially less than the first thickness of the reference layer;

    (2) a Ru capping layer on the composite free layer; and

    (3) a hard mask formed on the capping layer.

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