METHOD AND APPARATUS FOR REDUCING FREQUENCY MEMORY EFFECTS IN RF POWER AMPLIFIERS

• US 20090256632A1
• Filed: 04/10/2006
• Published: 10/15/2009
• Est. Priority Date: 04/10/2006
• Status: Active Grant

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Klingberg, Mats, Fonden, Tony
• Granted Patent: US 7,755,425 B2
• Time in Patent Office: Days
• US Class Current: 330/149
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 2201/3209 the amplifier comprising means for compensating memory effects
• CPC Class Codes: H03F 2201/3224 Predistortion being done for compensating memory effects
• CPC Class Codes: H03F 3/187 in integrated circuits

Abstract

The present invention relates to a predistorter for reducing memory effects in RF power amplifiers. The invention also relates to a method for reducing memory effects in RF power amplifiers and to a base station including such a predistorter. A predistorter according to the invention includes first means (1) for generating a first signal component, which is an estimate of a drain current of said amplifier, which means (1) for generating said first signal component comprises a linear filter, second means (8) for generating a second signal component as a function of said first signal component and at least one first gain function; third means (9) for generating a third signal component as a function of a conjugate of said first signal component and at least one second gain function, and fourth means (7) for combining at least said second signal component and said third signal component to form an output signal. The output signal from the predistorter is further used as input to the power amplifier, which when amplified reduces the memory effects of the amplifier.

Claims

1. A predistorter 200 for reducing frequency memory effects in a RF power amplifier, which predistorter has a predistorter input signal (x) and an output signal (v_g) wherein said predistorter includes

first means (1) for generating a first signal component (î

_d), which is an estimate of a drain current of said amplifier, which means (1) for generating said first signal component comprises a linear filter;

second means (8) for generating a second signal component (v₈) as a function of said first signal component (î

_d) and at least one first gain function (h₁₀, h₁₁, h₁₂, f₁), which at least one first gain function (h₁₀, h₁₁, h₁₂, f₁) represents the sensitivity of the power amplifier and is a function of the amplitude of a selected time-delayed version (v₃) of said first signal component (î

_d);

third means (9) for generating a third signal component (v₉) as a function of a conjugate of said first signal component (î

_d) and at least one second gain function (h₂₀, h₂₁, h₂₂, f₂ ), which at least one second gain function (h₂₀, h₂₁, h₂₂, f₂ ) represents the sensitivity of the power amplifier and is a function of the amplitude of said selected time-delayed version (v₃) of said first signal component (î

_d); and

fourth means (7) for combining at least said second signal component (v₈) and said third signal component (v₉) to form said output signal (v_g).

2. The predistorter according to claim 1 wherein said second means (8) and said third means (9) include fifth means (2) for generating an estimate of drain voltage variations ({circumflex over (δ

)}_v) of said amplifier as a function of a filtered linearity dependent on said first signal component (î

_d).

3. The predistorter according to claim 2 wherein said fifth means (2) for generating an estimate of said drain voltage variations ({circumflex over (δ

)}_v) includes at least a FIR filter or an IIR filter.

4. The predistorter according to claim 1 wherein said first means (1) for generating a first signal component (î

_d) includes at least a FIR filter or an IIR filter.

5. The predistorter according to claim 1 wherein said second means (8) for generating said second signal component (v₈) is a nonlinear filter described by a filter function

$\sum _{}^{}$

m = 0 2 

i ^ d 

[ n - m ] ·

h 1 

m 

( 

i ^ d 

[ n - k ] 

) ,

wherein î

_d[n−

m] represents said first signal component (î

_d) time-delayed by m, and h_1m(|î

_d[n−

k]|) represents said first gain function, and î

_d[n−

k] represents said selected time-delayed version of said first signal component (î

_d).

6. The predistorter according to claim 1 wherein said third means (9) for generating said third signal component (v₉) is a nonlinear filter described by a filter function

$\sum _{}^{}$

m = 0 2 

i ^ d * 

[ n - m ] ·

i ^ d 2 

[ n - k ] ·

h 2 

m 

( 

i ^ d 

[ n - k ] 

) ,

wherein î

*_d[n−

m] represents a conjugate of said first signal component (î

_d) time-delayed by m, and h_2m(|î

_d[n−

k]|) represents said second gain function, and î

_d[n−

k] represents said selected time-delayed version of said first signal component (î

_d).

7. The predistorter according to claim 1 wherein said predistorter further includes sixth means (4) for generating a fourth signal component (v₄), which sixth means (4) is a filter described by a filter function î

_d[n−

k]·

f₀(|î

_d[n−

k]|),

wherein î

_d[n−

k] represents said selected time-delayed version of said first signal component (î

_d) and f₀(|î

_d[n−

k]|) represents the memoryless behaviour of said amplifier, and wherein said fourth means (7) are arranged to combine at least said second, said third and said fourth signal components to form said output signal (v_g).

8. The predistorter according to claim 1 wherein said predistorter is particularly arranged to predistort a conventional power amplifier.

9. The predistorter according to claim 1 wherein said predistorter is particularly arranged to predistort a Doherty power amplifier.

10. The predistorter according to claim 1 wherein said predistorter is particularly arranged to predistort a Chireix power amplifier.

18. A base station (10) of a telecommunications system including a predistorter according to claim 1.

11. A method for reducing frequency memory effects in a RF power amplifier using a predistorter having an input signal (x) and an output signal (v_g), wherein said method comprises the steps of

generating (S1) a first signal component (î

_d) by estimating a drain current of said power amplifier using a linear filter;

generating (S2) a second signal component (v_g) as a function of said first signal component (î

_d) and at least one first gain function (h₁₀, h₁₁, h₁₂, f₁), which at least one first gain function (h₁₀, h₁₁, h₁₂, f₁) represents the sensitivity of the power amplifier and is a function of the amplitude of a selected time-delayed version (v₃) of said first signal component (î

_d);

generating (S3) a third signal component (v₉) as a function of a conjugate of said first signal component (î

_d) and at least one second gain function (h₂₀, h₂₁, h₂₂, f₂), which at least one second gain function (h₂₀, h₂₁, h₂₂, f₂), represents the sensitivity of the power amplifier and is a function of the amplitude of said selected time-delayed version (v₃) of said first signal component (î

_d); and

generating (S5) said output signal (v_g) by combining (S4) at least said second signal component (v_g) and said third signal component (v₉).

12. The method according to claim 11 further comprising the step of generating an estimate of drain voltage variations ({circumflex over (δ

)}_v) of said power amplifier as a function of a filtered linearity dependent on said first signal component (î

_d).

13. The method according to claim 12 wherein the step of generating an estimate of drain voltage variations ({circumflex over (δ

)}_v) comprises passing said first signal component (î

_d) through at least a linear FIR filter or an IIR filter.

14. The method according to claim 11 wherein the step (S1) of generating said first signal component (î

_d) comprises passing said input signal (x) through a FIR filter or an IIR filter.

15. The method according to claim 11 wherein the step (S2) of generating said second signal component (v₈) comprises using a nonlinear filter described by a filter function

$\sum _{}^{}$

m = 0 2 

i ^ d 

[ n - m ] ·

h 1 

m 

( 

i ^ d 

[ n - k ] 

) ,

wherein î

_d[n−

m] represents said first signal component (î

_d) time-delayed by m, and h_1m(|î

_d[n−

k]|) represents said first gain function, and î

_d[n−

k] represents said selected time-delayed version of said first signal component (î

_d).

16. The method according to claim 11 wherein the step (S3) of generating said third signal component (v₉) comprises using a nonlinear filter described by a filter function

$\sum _{}^{}$

m = 0 2 

i ^ d * 

[ n - m ] ·

i ^ d 2 

[ n - k ] ·

h 2 

m 

( 

i ^ d 

[ n - k ] 

) ,

wherein î

*_d[n−

m] represents a conjugate of said first signal component (î

_d) time-delayed by m, and h_2m(|î

_d[n−

k]|) represents said second gain function, and î

_d[n−

k] represents said selected time-delayed version of said first signal component (î

_d).

17. The method according to claim 11 further comprising a step of generating a fourth signal component (v₄) using a filter described by a filter function

î

_d[n−

k]·

f₀(|î

_d[n−

k]|),

wherein î

d[n−

k] represents said selected time-delayed version of said first signal component (î

_d), and f₀(|î

_d[n−

k]|) represents the memoryless behaviour of said amplifier, and wherein said step (S5) of generating said output signal (v_g) includes combining said second, said third and said fourth signal components.