RADIO FREQUENCY (RF) INTEGRATED CIRCUIT (IC) PACKAGES WITH INTEGRATED APERTURE-COUPLED PATCH ANTENNA(S) IN RING AND/OR OFFSET CAVITIES
First Claim
1. A radio-frequency integrated circuit chip package with N integrated aperture-coupled patch antennas, N being at least two, said package comprising:
- N generally planar patches;
at least one generally planar ground plane spaced inwardly from said N generally planar patches and substantially parallel thereto, said ground plane being formed with at least N coupling aperture slots therein, said slots being substantially opposed to said patches;
N feed lines spaced inwardly from said ground plane and substantially parallel thereto;
at least one radio frequency chip spaced inwardly from said feed lines and coupled to said feed lines and said ground plane;
a first substrate layer spaced inwardly from said feed lines, said first substrate layer being formed with a chip-receiving cavity, said chip being located in said chip-receiving cavity; and
a second substrate layer interposed in a region between said ground plane and a plane defined by said patch, wherein;
said patch is formed in a first metal layer;
said ground plane is formed in a second metal layer; and
said second substrate layer defines an antenna cavity, said N generally planar patches being located in said antenna cavity.
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Accused Products
Abstract
A radio-frequency integrated circuit chip package has N integrated aperture-coupled patch antennas, N being at least two, and includes N generally planar patches, and at least one generally planar ground plane spaced inwardly from the N generally planar patches and substantially parallel thereto. The ground plane is formed with at least N coupling aperture slots therein, and the slots are substantially opposed to the patches. N feed lines are spaced inwardly from the ground plane and substantially parallel thereto, and at least one radio frequency chip is spaced inwardly from the feed lines and coupled to the feed lines and the ground plane. A first substrate layer is spaced inwardly from the feed lines, and is formed with a chip-receiving cavity, with the chip located in the chip-receiving cavity. A second substrate layer is interposed in a region between the ground plane and a plane defined by the patch, the patch is formed in a first metal layer, the ground plane is formed in a second metal layer, and the second substrate layer defines an antenna cavity in which the N generally planar patches are located. “Island” and “offset” configurations, as well as fabrication methods, are also disclosed.
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Citations
15 Claims
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1. A radio-frequency integrated circuit chip package with N integrated aperture-coupled patch antennas, N being at least two, said package comprising:
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N generally planar patches; at least one generally planar ground plane spaced inwardly from said N generally planar patches and substantially parallel thereto, said ground plane being formed with at least N coupling aperture slots therein, said slots being substantially opposed to said patches; N feed lines spaced inwardly from said ground plane and substantially parallel thereto; at least one radio frequency chip spaced inwardly from said feed lines and coupled to said feed lines and said ground plane; a first substrate layer spaced inwardly from said feed lines, said first substrate layer being formed with a chip-receiving cavity, said chip being located in said chip-receiving cavity; and a second substrate layer interposed in a region between said ground plane and a plane defined by said patch, wherein; said patch is formed in a first metal layer; said ground plane is formed in a second metal layer; and said second substrate layer defines an antenna cavity, said N generally planar patches being located in said antenna cavity. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of fabricating a radio-frequency integrated circuit chip package with N integrated aperture-coupled patch antennas, N being at least two, said method comprising the steps of:
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providing a package comprising; N generally planar patches; at least one generally planar ground plane spaced inwardly from said N generally planar patches and substantially parallel thereto, said ground plane being formed with at least N coupling aperture slots therein, said slots being substantially opposed to said patches; N feed lines spaced inwardly from said ground plane and substantially parallel thereto; a first substrate layer spaced inwardly from said feed lines, said first substrate layer being formed with a chip-receiving cavity; a second substrate layer interposed in a region between said ground plane and a plane defined by said patch, wherein; said patch is formed in a first metal layer; said ground plane is formed in a second metal layer; and said second substrate layer defines an antenna cavity, said N generally planar patches being located in said antenna cavity; and an island formed in said second substrate layer, within said antenna cavity, thus defining a ring shape of said cavity, said island being substantially opposed to said chip-receiving cavity; and inserting at least one radio frequency chip into said chip-receiving cavity, with said island supporting loads induced by said insertion of said chip into said chip-receiving cavity. - View Dependent Claims (14)
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15. A method of fabricating a radio-frequency integrated circuit chip package with N integrated aperture-coupled patch antennas, N being at least two, said method comprising the steps of:
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providing a package comprising; N generally planar patches; at least one generally planar ground plane spaced inwardly from said N generally planar patches and substantially parallel thereto, said ground plane being formed with at least N coupling aperture slots therein, said slots being substantially opposed to said patches; N feed lines spaced inwardly from said ground plane and substantially parallel thereto; a first substrate layer spaced inwardly from said feed lines, said first substrate layer being formed with a chip-receiving cavity; a second substrate layer interposed in a region between said ground plane and a plane defined by said patch, wherein; said patch is formed in a first metal layer; said ground plane is formed in a second metal layer; said second substrate layer defines an antenna cavity, said N generally planar patches being located in said antenna cavity; and said antenna cavity is spaced away from said chip-receiving cavity when viewed in plan; and inserting at least one radio frequency chip into said chip-receiving cavity, such that loads incurred during insertion of said chip into said chip-receiving cavity are substantially supported away from said antenna cavity.
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Specification