Imaging device

• US 20090256938A1
• Filed: 04/09/2008
• Published: 10/15/2009
• Est. Priority Date: 04/09/2008
• Status: Active Grant

• Current Assignee: HL Klemove Corporation
• Original Assignee: Gentex Corporation
• Inventors: Andrus, Jeremy C., Bechtel, Jon H.
• Granted Patent: US 8,629,927 B2
• Time in Patent Office: Days
• US Class Current: 348/302
• CPC Class Codes: B60R 2001/1253 with cameras, video cameras or video screens
• CPC Class Codes: H04N 25/575 with a response composed of multiple slopes
• CPC Class Codes: H04N 25/589 with different integration times, e.g. short and long exposures
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors

Abstract

The present invention relates to improved imaging devices having high dynamic range and to monitoring and automatic control systems incorporating the improved imaging devices.

Claims

1. An imaging device, comprising:

an array of pixels wherein each active pixel of said array of pixels comprises a transfer gate, said transfer gate is independently controllable with respect to any other transfer gates associated with any other active pixel of said array of pixels.

2. An imaging device as in claim 1 wherein a pre-sample integration period is used to initiate a selectable integration period.

3. An imaging device as in claim 2 wherein time is provided within at least one image acquisition sequence to take a pre-sample reading to determine whether or not to select the longest of the available integration periods.

4. An imaging device as in claim 2 wherein a first time to acquire a pre-sample reading plus a second time associated with the presently selected longest integration period fit within a longest image acquisition sequence time interval.

5. An imaging device as in claim 3 wherein a first time to acquire a pre-sample reading plus a second time associated with the presently selected longest integration period fit within a longest image acquisition sequence time interval.

6. An imaging device as in claim 5 wherein said longest image acquisition sequence time interval is less than 0.069 seconds.

7. An imaging device as in claim 5 wherein said longest image acquisition sequence time interval is less than 0.039 seconds.

8. An imaging device as in claim 1 wherein the execution of tasks following a first pre-sample to select an integration period for a given pixel is confined to a period during which the longest integration may take place for said pixel.

9. An imaging device as in claim 1 wherein a parallel addressable group of pixels constitutes a substantial portion of a row of pixels in said array of pixels.

10. An imaging device as in claim 1 wherein a value resulting from a pre-sample integration period is compared against a threshold for selecting a desired integration period.

11. An imaging device as in claim 1 wherein four or fewer bits of data are stored for each pixel in memory.

12. An imaging device as in claim 11 wherein said memory is fabricated on a same integrated circuit substrate as said array of pixels.

13. An imaging device as in claim 1 wherein only one digitized reading of an integrated charge level is taken for each pixel and digitized readings are taken for pixels in a predetermined order.

14. An imaging device as in claim 1 wherein different sets of selectable integration periods are provided for different image acquisition sequences.

15. An imaging device as in claim 14 wherein a first of said set of selectable integration periods is utilized in ambient lighting conditions above a threshold and a second of said set of selectable integration periods is utilized in ambient light conditions below a threshold.

16. An imaging device as in claim 1 wherein all integration periods which may be selected for a pixel end at the same time.

17. An imaging device as in claim 6 wherein the determination to reset a given pixel to initiate a selected integration period is based at least in part on a result of a compare task of an indication of the accumulated charge on said given pixel to a threshold level after said pre-sample integration.

18. An imaging device as in claim 10 wherein compare task is analog and is performed at least one location generally external to said array of pixels.

19. An imaging device as in claim 8 wherein reset to begin an integration period is bypassed for a pixel if a recorded indication of an active integration period for said pixel indicates that an integration period is selected and in progress for said pixel.

20. An imaging device as in claim 12 wherein dynamic memory is used for memory associated with each pixel.

23. An imaging device as in claim 1 wherein readout of parallel addressable groups of pixels is performed at periodic intervals during an image acquisition sequence.

24. An imaging device as in claim 1 wherein a ratio of a longest to a shortest available integration period is greater than 3500.

25. An imaging device as in claim 1 wherein a ratio of any available integration period other than a shortest to a next shorter available integration period is less than 10.

26. An imaging device in claim 1 wherein said available integration periods decrease ratio-metrically.

27. An imaging device in claim 1 wherein said available integration periods decrease geometrically.

21. An imaging device as in claim 21 wherein said dynamic memory incorporates capacitive elements to store a bit value.

28. An imaging device, comprising:

an array of pixels partitioned into at least 16 parallel addressable groups of pixels configured such that any given parallel addressable group of pixels within said array of pixels may be independently selected and subject active pixels of said selected parallel addressable group of pixels to at least one specified task, wherein at least one of said tasks is a selective reset task performed as a single task simultaneously operating on at least a substantial subset of active pixels of said selected parallel addressable group of pixels to determine active pixels to selectively reset and to perform said reset selectively according to a determination and recordation of an indication of a reset for each pixel which is reset, said tasks being performed in parallel for at least a substantial subset of pixels in said selected parallel addressable group of pixels.

22. An imaging device as in claim 30 wherein refresh tasks for said dynamic memory is scheduled along with other image acquisition tasks.

29. An imaging device as in claim 28 wherein a said parallel addressable group of pixels defines a substantial portion of a row of pixels in said array of pixels.

30. An imaging device as in claim 28 wherein a group of commonly spectral filtered pixels of a series of Bayer patterned spectrally filter pixels defines a parallel addressable group of pixels.

31. An imaging device as in claim 29 further comprising a row of reset control circuits wherein each is linked via an associated communication path to an individual pixel in said selected parallel addressable group of pixels.

32. An imaging device as in claim 31 wherein said row of reset control circuits is configured to perform selective reset of pixels in said selected parallel addressable group of pixels in a substantially parallel operation.

33. An imaging device as in claim 28 wherein comparators and logic circuits perform selective reset functions and are partitioned into similar blocks each of which operate on one or more pixels of said selected parallel addressable group of pixels with the logic in the blocks at least partially duplicated from one block to the next.

34. An imaging device as in claim 28 wherein pixels of a parallel addressable group are sampled at least partially in parallel and digitized using sequential tasks which partially overlap selective reset tasks.

35. An imaging device as in claim 28 wherein pixels of a first parallel addressable group of pixels are first reset to begin a first pre-sample period and subsequently are subjected to a series of conditional resets to conditionally reset pixels on a pixel by pixel basis and to initiate an integration period for a new pre-sample or for an integration period selected for the pixel.

36. An imaging device as in claim 35 wherein determination to reset a pixel and to initiate a selectable integration period is based at least in part on a result of a comparison of an indication of a charge accumulated on any given pixel during a pre-sample period to a threshold level.

37. An imaging device as in claim 35 wherein a record is maintained in a corresponding memory for each pixel indicating if an integration period has been selected for the pixel and if so what integration period has been selected for the pixel.

38. An imaging device as in claim 37 wherein said memory is fabricated on a common integrated circuit substrate with said array of pixels.

39. An imaging device as in claim 37 wherein said memory associated with pixels of an addressable group may be accessed substantially in parallel.

40. An imaging device as in claim 35 wherein conditional reset to begin an additional pre-sample period is bypassed for a given active pixel if a value recorded in said memory for said given active pixel indicates that an integration period has been selected for said given active pixel.

41. An imaging device in claim 35 wherein integrated charge on a pixel is digitized only once for each pixel which is read.

42. An imaging device as in claim 37 wherein dynamic memory is used for said memory associated with each pixel.

43. An imaging device as in claim 42 wherein said dynamic memory incorporates capacitive elements to store a bit value.

44. An imaging device as in claim 42 wherein refresh tasks for said dynamic memory are scheduled along with other tasks.

45. An imaging device, comprising:

an array of pixels which utilizes a charge transfer mechanism for readout and which are partitioned into parallel addressable groups of pixels;

a pixel read task to read active pixels of an addressed parallel addressable group of pixels; and

multiple integration period initiating tasks each operable to initiate a different one of a set of available integration periods conditionally for selected pixels in an individually addressed parallel addressable group of pixels, said read task and each of said integration period initiating tasks are initiated at predetermined times in a task sequencing interval and each task is bypassed or assigned an addressable group of pixels with pixels on which to perform a given task.

46. An imaging device as in claim 45 configured to provide repetitious performance of tasks during said task sequencing intervals and to assign different parallel addressable groups of pixels to corresponding tasks for each of the task sequencing intervals such that substantially all tasks are performed on every parallel addressable group of pixels to complete image acquisition sequence.

47. An imaging device as in claim 45 wherein a task to establish an initial pre-sample integration period performs an unconditional reset of each pixel of an addressed parallel addressable group of pixels is employed to initiate one of a set of selectable integration periods and first makes a determination, on a pixel by pixel basis, of pixels for which the said integration period is to be initiated and initiates said integration period selectively by selective reset of said pixel.

48. An imaging device as in claim 45 wherein an indication of the integration period which is active for each pixel is recorded in a memory.

49. An imaging device as in claim 45 wherein an integration period initiated by a task in a particular task sequencing interval is established in part by the time that the task is initiated in the task sequencing interval and in part by the choice of the parallel addressable group of pixels selected to be operated on by the task.

50. An imaging device as in claim 45 wherein a parallel addressable group of pixels constitutes a substantial portion of a row of pixels in the imaging frame.

51. An imaging device as in claim 46 wherein the total number times the tasks of the task sequencing interval are performed during a single image acquisition sequence equals or exceeds the number of parallel addressable groups having active pixels.

52. An imaging device as in claim 45 wherein tasks in a task sequencing interval are scheduled such that components shared by said tasks are used by only one task at a time.

53. An imaging device as in claim 45 wherein integration periods for at least some of the pixels read out in an image acquisition sequence begin before readout of all pixels of the preceding image acquisition sequence.

54. An imaging device as in claim 45 wherein dynamic memory is used for memory associated with each pixel.

55. An imaging device as in claim 54 wherein a task to refresh said dynamic memory is provided and scheduled during said task sequencing interval.

56. An imaging device comprising:

an array of active pixels which are based on a 4 T pixel structure;

a set of available integration periods;

one of said set of available integration periods is selected and recorded in memory for substantially every active pixel; and

at the end of an integration period, a reading of an integrated charge level on each pixel is digitized and output in a form that may be mapped directly into a mantissa of a floating point representation along with a corresponding indication of said integration period used to read said pixel is output in a form which may be mapped into an exponent of a floating point representation of a pixel value.

57. An imaging device as in claim 56 wherein a ratio in sensitivity for a pixel using a first available integration period relative to a second sensitivity using another of said available integration periods is approximately an integral power of 2.

58. An imaging device, comprising:

at least one parallel addressable group of pixels which are based on a 4 T pixel structure comprising a start of integration period for each pixel within said parallel addressable group of pixels dynamically determined within an image acquisition sequence; and

an end of integration for each pixel within said parallel addressable group of pixels that is substantially simultaneous for all pixels within said parallel addressable group of pixels.

59. An imaging device as in claim 58 wherein a start of integration for any given pixel within said parallel addressable group of pixels is independent of any other pixel within said parallel addressable group of pixels.

60. An imaging device as in claim 58 wherein at least one start of integration is selected from a set of available integration periods.

61. An imaging device as in claim 60 wherein said set of available integration periods is derived from an instruction prior to an image acquisition sequence.

62. An imaging device, comprising:

a two dimensional array of pixels which are based on a 4 T pixel structure and a memory register associated with each pixel of said two dimensional array of said pixels for storing an indication of a selected integration period for a given pixel, wherein said selected integration period is selected from a set of at least four available integration periods based on at least one comparison during an image acquisition period.

63. An imaging device as in claim 62 wherein said memory register is at least partially outside an area defined by said two dimensional array of pixels.

64. An imager device as in claim 62 wherein the stored indicator also indicates when an integration period has been selected for the given pixel.

65. An imaging device, comprising:

a two dimensional array of pixels which are based on a 4 T pixel structure; and

an image acquisition sequence comprising;

at least one pre-sample task;

at least one integration period selection task; and

at least one pixel read task.

66. An imaging device as in claim 65 wherein said image acquisition sequence further comprises at least one unconditional pixel reset task.

67. An imaging device as in claim 66 wherein said at least one pre-sample task and said at least one integration period selection task are scheduled according to a task sequencing interval within said image acquisition sequence.

68. An imaging device as in claim 66 wherein said at least one pre-sample task, said at least one integration period selection task and said at least one pixel read task are scheduled according to task sequencing intervals within said image acquisition sequence.