SEMICONDUCTOR DEVICE

• US 20090257212A1
• Filed: 07/25/2007
• Published: 10/15/2009
• Est. Priority Date: 08/09/2006
• Status: Active Grant

• Current Assignee: Honda Motor Co., Ltd. (Honda Motor Company)
• Original Assignee: Honda Motor Company
• Inventors: Otsuka, Hiroshi, Watanabe, Shinya, Takano, Fumitomo, Aiba, Tsukasa, Nakashima, Joji
• Granted Patent: US 8,045,335 B2
• Time in Patent Office: Days
• US Class Current: 361/784
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49113 the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
• CPC Class Codes: H01L 25/071 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

A semiconductor device includes first and second assembled bodies (12A, 12B). The first assembled body is provided with a first semiconductor chip, a high voltage bus bar (21) connected to one surface of the first semiconductor chip, a first metal wiring board (24-1) connected to the other surface of the first semiconductor chip with a bonding wire, and a third metal wiring board (24-3) connected to the first metal wiring board. The second assembled body is provided with a second semiconductor chip, a low voltage bus bar (23) connected to one surface of the second semiconductor chip with a bonding wire, a second metal wiring board (24-2) connected to the other surface of the second semiconductor chip, and a fourth metal wiring board (24-4) connected by being returned from an end portion of the second metal wiring board and arranged in parallel to the second metal wiring board. The first assembled body and the second assembled body are arranged in a stacked structure wherein the assembled bodies are being separated. Inductance of a main circuit is reduced by the semiconductor module structure.

Claims

1. A semiconductor device comprising:

a first assembly including;

a first semiconductor chip,

a high-voltage bus bar that is bonded to one surface of the first semiconductor chip and that has a high-voltage terminal,

a first metal wiring board that is connected to another surface of the first semiconductor chip using a bonding wire, and

a third metal wiring board that is linked to the first metal wiring board, is separated by a prescribed interval from the bonding wire connected to the other surface of the first semiconductor chip, and is positioned parallel to the high-voltage bus bar;

a second assembly including;

a second semiconductor chip,

a low-voltage bus bar that is connected to one surface of the second semiconductor chip using a bonding wire and that has a low-voltage terminal,

a second metal wiring board that is bonded to another surface of the second semiconductor chip, and

a fourth metal wiring board that is linked by being bent from an end portion of the second metal wiring board, is separated by a prescribed interval from the bonding wire connected to the second semiconductor chip, and is positioned parallel to the second metal wiring board; and

an output bus bar having an output terminal extending from each end portion of the third metal wiring board and of the fourth metal wiring board,

wherein the first assembly and the second assembly are positioned in separated, layered structures, and the output bus bar is positioned between the layered structures.

2. The semiconductor device according to claim 1, wherein the first metal wiring board and the third metal wiring board are formed as separate members, and the second metal wiring board and the fourth metal wiring board are formed as separate members.

3. The semiconductor device according to claim 1 or 2, wherein a metal spacer is provided between the first metal wiring board and the third metal wiring board and between the second metal wiring board and the fourth metal wiring board, and a gap between the third metal wiring board and the bonding wire as well as a gap between the fourth metal wiring board and the bonding wire are configured to be adjustable.

4. The semiconductor device according to claim 1, wherein both of the first and second semiconductor chips have a power semiconductor element and a rectifier semiconductor element,

when the semiconductor device is driven so that a greater portion of current flows to the power semiconductor elements relative to the rectifier semiconductor elements, the power semiconductor element of the first semiconductor chip is positioned closer to the high-voltage terminal via the high-voltage bus bar, and the power semiconductor element of the second semiconductor chip is positioned farther from the low-voltage terminal via the second metal wiring board,

when the semiconductor device is driven so that a lesser portion of current flows to the power semiconductor elements relative to the rectifier semiconductor elements, the power semiconductor element of the first semiconductor chip is positioned farther from the high-voltage terminal via the high-voltage bus bar, and the power semiconductor element of the second semiconductor chip is positioned closer to the low-voltage terminal via the second metal wiring board, and

the bonding wires connected to the power semiconductor elements are made longer than the bonding wires connected to the rectifier semiconductor elements.

5. The semiconductor device according to claim 1, further comprising:

a first control substrate that is positioned parallel to the third metal wiring board and that controls the first semiconductor chip; and

a second control substrate that is positioned parallel to the third metal wiring board and that controls the second semiconductor chip.

10. The semiconductor device according to claim 5 or 9, wherein first and second magnetic resistance elements are mounted in opposing positions on both the first and second control substrates, and a part of the output bus bar is extended between the first magnetic resistance element and the second magnetic resistance element.

11. The semiconductor device according to claim 10, wherein a region of the output bus bar from a bonding portion of the first and second metal wiring boards to the magnetic resistance elements is disposed perpendicularly with respect to a surface on the outside of the control substrates.

6. A semiconductor device comprising:

a first assembly having a first semiconductor chip, a high-voltage bus bar that is bonded to one surface of the first semiconductor chip and that has a high-voltage terminal, and a first metal wiring board that is bonded to another surface of the first semiconductor chip;

a second assembly having a second semiconductor chip, a low-voltage bus bar that is bonded to one surface of the second semiconductor chip and that has a low-voltage terminal, and a second metal wiring board that is bonded to another surface of the second semiconductor chip; and

an output bus bar having an output terminal extending from each end portion of the first metal wiring board and of the second metal wiring board,

wherein the first assembly and the second assembly are positioned in separated, layered structures, and the output bus bar is positioned between the layered structures.

7. The semiconductor device according to claim 6, wherein a length of an electric current pathway from the high-voltage terminal through the first semiconductor chip to the output terminal, and a length of an electric current pathway from the low-voltage terminal through the second semiconductor chip to the output terminal are substantially equal.

8. The semiconductor device according to claim 6 or 7, wherein both of the first and second semiconductor chips are provided with a power semiconductor element and a rectifier semiconductor element,

when the semiconductor device is driven so that a greater portion of current flows to the power semiconductor elements relative to the rectifier semiconductor elements, the power semiconductor element of the first semiconductor chip is positioned farther from the high-voltage terminal via the high-voltage bus bar, and the power semiconductor element of the second semiconductor chip is positioned farther from the low-voltage terminal via the second metal wiring board, and

when the semiconductor device is driven so that a lesser portion of current flows to the power semiconductor elements relative to the rectifier semiconductor elements, the power semiconductor element of the first semiconductor chip is positioned closer to the high-voltage terminal via the high-voltage bus bar, and the power semiconductor element of the second semiconductor chip is positioned closer to the low-voltage terminal via the second metal wiring board.

9. The semiconductor device according to claim 6, further comprising:

a first control substrate that is positioned parallel to the first metal wiring board and that controls the first semiconductor chip; and

a second control substrate that is positioned parallel to the low-voltage bus bar and that controls the second semiconductor chip.