FUSE INFORMATION CONTROL DEVICE, SEMICONDUCTOR INTEGRATED CIRCUIT USING THE SAME, AND CONTROL METHOD THEREOF

• US 20090257300A1
• Filed: 12/31/2008
• Published: 10/15/2009
• Est. Priority Date: 04/10/2008
• Status: Abandoned Application

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Lee, Jeong Woo, Choi, Won Jun, Moon, Hyung Wook
• Application Number:
  US12/347,228
• Publication Number:
  US 20090257300A1
• Time in Patent Office: Days
• US Class Current: 365/225.700
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 29/80 with improved layout

Abstract

A fuse information control device having a delay circuit to delay an active signal, includes a fuse circuit that outputs fuse information in response to a fuse information control signal, and a fuse information control signal generating unit that generates the fuse information control signal in response to one of the active signal and internal delay signals of the delay circuit.

Claims

1. A fuse information control device having a delay circuit to delay an active signal, the fuse information control device comprising:

a fuse circuit that outputs fuse information in response to a fuse information control signal; and

a fuse information control signal generating unit that generates the fuse information control signal in response to one of the active signal and internal delay signals of the delay circuit.

2. The fuse information control device of claim 1, wherein the delay circuit is included in a sense amplifier controller that generates at least one sense amplifier driving signal for controlling a sense amplifier by delaying the active signal.

3. The fuse information control device of claim 1, wherein the fuse information control signal generating unit activates the fuse information control signal in response to the active signal and deactivates the fuse information control signal in response to one of the internal delay signals.

4. The fuse information control device of claim 1, wherein the fuse information control signal generating unit includes:

a pulse generating unit that generates a pulse signal if one of the internal delay signals is activated; and

a signal shifting unit that activates the fuse information control signal in response to the active signal, and that deactivates the fuse information control signal in response to the pulse signal.

5. The fuse information control device of claim 4, wherein the fuse information control signal generating unit further includes a circuit that initializes the fuse information control signal in response to a power-up signal.

6. A semiconductor integrated circuit, comprising:

a sense amplifier controller that generates a plurality of driving signals for driving a sense amplifier by delaying an active signal by a plurality of time periods, each different from one another;

a fuse circuit that outputs fuse information in response to a fuse information control signal; and

a fuse information control signal generating unit that generates the fuse information control signal in response to one of the active signal and internal delay signals of the sense amplifier controller.

7. The semiconductor integrated circuit of claim 6, wherein the internal delay signals are generated by branching output of a plurality of delay elements for generating the driving signals.

8. The semiconductor integrated circuit of claim 6, wherein the fuse information control signal generating unit activates the fuse information control signal in response to the active signal, and deactivates the fuse information control signal in response to one of the internal delay signals.

9. The semiconductor integrated circuit of claim 6, wherein the fuse information control signal generating unit includes:

a pulse generating unit that generates a pulse signal if one of the internal delay signals is activated; and

a signal shifting unit that activates the fuse information control signal in response to the active signal, and that deactivates the fuse information control signal in response to the pulse signal.

10. The semiconductor integrated circuit of claim 9, wherein the fuse information control signal generating unit further includes a circuit that initializes the fuse information control signal in response to a power-up signal.

11. A fuse information control method of a semiconductor integrated circuit including a delay circuit that delays an active signal and a fuse circuit that outputs fuse information in response to a fuse information control signal, the fuse information control method comprising:

activating the fuse information control signal in response to the active signal; and

deactivating the fuse information control signal in response to one of internal delay signals of the delay circuit.

12. The fuse information control method of claim 11, wherein the internal delay signals include internal delay signals of the delay circuit provided in order to generate a sense amplifier driving signal by delaying the active signal by a plurality of time periods, each different from one another.