FLASH MANAGEMENT USING SEQUENTIAL TECHNIQUES

• US 20090259800A1
• Filed: 04/15/2008
• Published: 10/15/2009
• Est. Priority Date: 04/15/2008
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: ADTRAN Incorporated (ADTRAN Holdings, Inc.)
• Inventors: Ellis, Robert W., Fitzgerald, Alan A., Kilzer, Kevin L., Sterbenz, Rudolph J.
• Granted Patent: US 8,566,505 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks

Abstract

Disclosed are techniques for flash memory management, including receiving data from a host, writing the data to a flash memory device in the order it was received from the host, and providing at least one data structure configured to locate the data written to the flash memory device.

Claims

1. A method for flash memory management, comprising:

receiving data from a host;

writing the data in the order it was received to at least one erase block in a flash memory device; and

providing at least one data structure configured to locate data written to the flash memory device.

2. The method of claim 1, wherein writing the data in the order it was received further comprises writing the data in a sequential manner within the at least one erase block.

3. The method of claim 1, wherein the at least one data structure is configured to store physical erase block (PEB) information.

4. The method of claim 1, wherein the at least one erase block comprises an index page configured to store erase block index information.

6. The method of claim 4, wherein the erase block index information reflects that there is no ordinal relationship among pages in the erase block.

7. The method of claim 1, wherein the at least one data structure is contained entirely in random access memory.

8. The method of claim 3, wherein the at least one data structure configured to store physical erase block information comprises information configured to map consecutive pages of incoming payload data to different flash chips.

9. The method of claim 3, wherein the at least one data structure configured to store physical erase block information comprises a bitfield indicating if a page is obsolete.

10. The method of claim 3, wherein the at least one data structure configured to store physical erase block information comprises information configured to prevent at least one erase block from being used.

11. The method of claim 1, further comprising retrying a failed write operation without alerting the host.

12. The method of claim 11, wherein a user-selectable number of retries are performed.

5. The method of claim 5, further comprising using the index page to construct at least one data structure when the flash memory device is powered on.

13. A method for data management on a flash memory device, comprising:

providing data to a flash memory device;

writing the data to at least one erase block on the flash memory device in the order it was received; and

mapping the location of the data on the flash memory device, wherein the mapping comprises providing at least one data structure contained entirely in random access memory.

14. The method of claim 13, wherein the at least one erase block further comprises an index page configured to store erase block index information.

15. The method of claim 14, wherein the index page is configured to store erase block index information for a different erase block.

16. A solid state drive, comprising:

a flash controller configured to communicate with a host; and

at least one flash chip configured to receive payload data from the flash controller, wherein the flash controller is configured to write incoming payload data to the at least one flash chip in a manner which preserves time order of the incoming payload data.

17. The solid state drive of claim 16, wherein the flash controller comprises a buffer-host machine, a media-buffer machine, a data buffer, a local buffer, and a sequence and control machine.

18. The solid state drive of claim 16, wherein the flash controller is configured to write incoming payload data in a sequential manner within an erase block.

19. A data storage system, comprising:

a memory configured for block-based erase operations; and

a controller coupled to the memory, wherein the controller is configured to write incoming data to the memory in the order the data is received.

20. The data storage system of claim 19, wherein the controller comprises a buffer-host machine, a media-buffer machine, a data buffer, a local buffer, and a sequence and control machine.

21. The data storage system of claim 19, wherein the controller is configured to write incoming payload data in a sequential manner within an erase block.

22. The data storage system of claim 19, wherein the memory is a flash memory.