FLASH MANAGEMENT USING LOGICAL PAGE SIZE

• US 20090259805A1
• Filed: 04/15/2009
• Published: 10/15/2009
• Est. Priority Date: 04/15/2008
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: ADTRAN Incorporated (ADTRAN Holdings, Inc.)
• Inventors: Ellis, Robert W., Kilzer, Kevin L., Sterbenz, Rudolph J.
• Granted Patent: US 8,180,954 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory

Abstract

Disclosed are techniques for flash memory management, including tracking payload data via one or more data structures configured to define the size of logical pages in a flash memory. In various embodiments, the logical page size may be larger than, equal to, or smaller than a physical page size of a flash memory chip.

Claims

1. A method for flash memory management, comprising:

constructing a data table associated with a flash memory, wherein entries of the data table correspond to logical pages within the memory, and wherein the size of the logical pages is smaller than a size of a physical page in the memory; and

updating the data table responsive to payload data being stored in at least one logical page within the flash memory, wherein the payload data is written to the flash memory in the order it was received from a host.

2. The method of claim 1, wherein writing the payload data in the order it was received further comprises writing the payload data in a sequential manner within at least one erase block in the flash memory.

3. The method of claim 2, wherein the contents of the data table reflect that there is no ordinal relationship among pages in an erase block in the flash memory.

4. The method of claim 1, wherein the flash memory comprises at least two flash chips, and wherein the data table comprises information configured to map consecutive pages of incoming payload data to different flash chips.

5. The method of claim 1, wherein the data table comprises a bitfield indicating if a logical page is obsolete.

6. The method of claim 1, wherein the data table comprises information configured to prevent at least one erase block in the flash memory from being used to store payload data.

7. The method of claim 1, wherein the data table is stored entirely in a random access memory.

8. The method of claim 1, further comprising storing, in an erase block in the flash memory, error correcting information associated with payload data written to a different erase block in the flash memory.

9. The method of claim 1, wherein the data table is constricted responsive to the flash memory being powered on.

10. The method of claim 1, wherein the data table comprises information configured to map consecutive logical pages of incoming payload data to different flash chips.

11. The method of claim 10, wherein the flash memory comprises at least two flash memory chips having different storage capacities.

12. A data storage system, comprising:

a memory configured for block-based erase operations;

a controller in communication with the memory, wherein the controller is configured to write incoming data to the memory in the order the data is received; and

a data table in communication with the controller, wherein entries of the data table correspond to logical pages within the memory, and wherein the size of the logical pages is smaller than a size of a physical page in the memory.

13. The data storage system of claim 12, wherein the size of the logical pages is smaller than the size of any physical page in the memory.

14. The data storage system of claim 12, wherein the controller comprises a buffer-host machine, a media-buffer machine, a data buffer, a local buffer, and a sequence and control machine.

15. The data storage system of claim 14, wherein the controller is configured to write incoming payload data in a sequential manner within an erase block in the memory.

16. The data storage system of claim 15, wherein the memory is a flash memory.

17. A tangible computer-readable medium having instructions stored thereon, the instructions comprising:

instructions to construct a data table associated with a flash memory, wherein entries of the data table correspond to logical pages within the memory, and wherein the size of the logical pages is smaller than a size of a physical page in the memory; and

instructions to update the data table responsive to payload data being stored in at least one logical page within the flash memory, wherein the payload data is written to the flash memory in the order it was received from a host.