SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20090261325A1
• Filed: 04/14/2009
• Published: 10/22/2009
• Est. Priority Date: 04/16/2008
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Uchiyama, Hiroyuki, Hatano, Mutsuko, Sato, Takeshi, Kawamura, Tetsufumi
• Granted Patent: US 7,977,675 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A metallic oxide semiconductor device with high performance and small variations. It is a field effect transistor using a metallic oxide film for the channel, which includes a channel region and a source region and comprises a drain region with a lower oxygen content than the channel region in the metallic oxide, in which the channel region exhibits semiconductor characteristics and the oxygen content decreases with depth below the surface.

Claims

1. A semiconductor device which is a field-effect transistor using a metallic oxide for a channel,

wherein said metallic oxide includes a channel region and includes a source region and drain region having a lower oxygen content and higher conductivity than said channel region, and

wherein said channel region exhibits semiconductor characteristics and the oxygen content decreases with depth below the surface.

2. A semiconductor device according to claim 1, said field-effect transistor is a bottom-gate type thin film transistor in which a gate electrode, a gate insulator film, a metallic oxide film are formed, in order, over a substrate, and a source electrode and a drain electrode are formed thereon,

wherein a region for superimposing said source electrode is said source region in said metallic oxide film,

wherein a region for superimposing said drain electrode is said drain region in said metallic oxide film, and

wherein a region between said drain region and said source region is said channel region in said metallic oxide film.

3. A manufacturing method of a semiconductor device according to claim 2,

wherein said channel region having a higher oxygen content than said source region and said drain region is formed by using said source electrode and said drain electrode for a mask and by introducing oxygen into the metallic oxide film between said source electrode and said drain electrode.

4. A semiconductor device according to claim 1, said field-effect transistor is a top-gate type thin film transistor in which said metallic oxide film is formed over a substrate, a source electrode and a drain electrode are formed thereon and, further thereon, a gate insulator film and a gate electrode are formed, in order,

wherein a region for superimposing said source electrode is said source region in said metallic oxide film,

wherein a region for superimposing said drain electrode is said drain region in said metallic oxide film, and

wherein a region between said drain region and said source region is said channel region in said metallic oxide film.

5. A manufacturing method of a semiconductor device according to claim 4,

wherein said channel region having a higher oxygen content than said source region and said drain region is formed by using said source electrode and said drain electrode for a mask and by introducing oxygen into the metallic oxide film between said source electrode and said drain electrode.

6. A manufacturing method of a semiconductor device according to claim 1, said field-effect transistor is a top-gate type thin film transistor in which a source electrode and a drain electrode are formed over a substrate, and said metallic oxide film, a gate insulator film, and a gate electrode are formed, in order, thereon

wherein, after forming said metallic oxide film, a channel region having a higher oxygen content than said source region and said drain region is formed by forming a mask opening a channel-forming region of said metallic oxide film and by introducing oxygen into said metallic oxide film from said opening.

7. A manufacturing method of a semiconductor device according to claim 3,

wherein introduction of oxygen is carried out by any of oxygen plasma irradiation, oxygen atmosphere anneal, and radical oxidation.

8. A semiconductor device,

wherein a plurality of semiconductor devices using a metallic oxide film for a channel is formed over the same substrate,

wherein a first group semiconductor device having a high threshold voltage and a second group semiconductor device having a low threshold voltage are included, and

wherein at least the first group semiconductor device is comprised of a semiconductor device according to claim 1.

9. A semiconductor device according to claim 8,

wherein at least one more insulator film from the insulator film over the channel region of said first group semiconductor device is formed over the channel region of said second group semiconductor device.

10. A manufacturing method of a semiconductor device, a first group semiconductor device having a high threshold voltage and a second group semiconductor device having a low threshold voltage being formed over the same substrate,

wherein a protection film is formed over the channel region of the first group semiconductor device and a manufacturing method according to claim 3 is applied to the manufacture of the second group semiconductor device.

11. A manufacturing method of a semiconductor device, a first group semiconductor device having a high threshold voltage and a second group semiconductor device having a low threshold voltage being formed over the same substrate,

wherein a manufacturing method according to claim 3 is applied to the second group semiconductor device and a protection film is formed over the channel region of the second group semiconductor device, and

wherein a manufacturing method according to claim 3 is applied to the second group semiconductor device.

12. A display device, wherein a semiconductor device according to claim 1 is formed over a substrate.

13. A memory device, wherein a semiconductor device according to claim 1 is formed over a substrate.