INTEGRATED MEMS DEVICE AND CONTROL CIRCUIT

• US 20090261416A1
• Filed: 04/18/2008
• Published: 10/22/2009
• Est. Priority Date: 04/18/2008
• Status: Abandoned Application

• Current Assignee: Bernhard Winkler, Wolfgang Raberg
• Original Assignee: Bernhard Winkler, Wolfgang Raberg
• Inventors: Winkler, Bernhard, Raberg, Wolfgang
• Application Number:
  US12/105,989
• Publication Number:
  US 20090261416A1
• Time in Patent Office: Days
• US Class Current: 257/351
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0728 Pre-CMOS, i.e. forming the micromechanical structure before the CMOS circuit

Abstract

An integrated circuit includes a silicon-on-insulator (SOI) substrate including a buried oxide layer positioned between a top-side silicon layer and a bottom-side silicon layer. A micro-electromechanical system (MEMS) device is integrated into the top-side silicon layer. A semiconductor layer is formed over the bottom-side silicon layer. A control circuit is integrated into the semiconductor layer and is configured to control the MEMS device.

Claims

1. An integrated circuit, comprising:

a silicon-on-insulator (SOI) substrate including a buried oxide layer positioned between a top-side silicon layer and a bottom-side silicon layer;

a micro-electromechanical system (MEMS) device integrated into the top-side silicon layer;

a semiconductor layer formed over the bottom-side silicon layer; and

a control circuit integrated into the semiconductor layer and configured to control the MEMS device.

2. The integrated circuit of claim 1, wherein the MEMS device is a MEMS resonator device.

3. The integrated circuit of claim 2, wherein the MEMS resonator includes a silicon resonator structure formed in the top-side silicon layer, and a plurality of electrodes formed in the top-side silicon layer.

4. The integrated circuit of claim 3, and further comprising:

at least one metal-filled via in contact with at least one of the electrodes, and extending through the buried oxide layer, the bottom-side silicon layer, and the semiconductor layer.

5. The integrated circuit of claim 1, and further comprising:

at least one contact pad positioned adjacent to a bottom-side of the SOI substrate and connected to at least one metal-filled via that extends through the buried oxide layer, the bottom-side silicon layer, and the semiconductor layer.

6. The integrated circuit of claim 1, and further comprising:

at least one contact pad positioned adjacent to a bottom-side of the SOI substrate; and

wherein the integrated circuit includes no contact pads positioned adjacent to a top-side of the SOI substrate.

7. The integrated circuit of claim 1, wherein the top-side silicon layer and the bottom-side silicon layer are each a single crystal silicon layer.

8. The integrated circuit of claim 1, wherein the control circuit comprises an application specific integrated circuit (ASIC).

9. The integrated circuit of claim 1, and further comprising:

a non-conductive layer formed on the top-side silicon layer.

10. The integrated circuit of claim 9, wherein the non-conductive layer is a SiN layer.

11. The integrated circuit of claim 9, and further comprising:

a protective cap layer formed on the non-conductive layer.

12. The integrated circuit of claim 11, wherein the protective cap layer is a Si layer.

13. The integrated circuit of claim 1, wherein the MEMS device and the control circuit are formed using substantially different processing technologies.

14. The integrated circuit of claim 1, wherein the semiconductor layer is an n−

doped epitaxial silicon layer.

15. A method of manufacturing an integrated circuit, comprising:

providing a silicon-on-insulator (SOI) substrate;

forming a micro-electromechanical system (MEMS) resonator device in a first silicon layer of the substrate;

forming a control circuit in a second silicon layer, the second silicon layer separated from the first silicon layer by a buried oxide layer, the control circuit configured to control the MEMS resonator device; and

forming at least one metal-filled via that extends through the buried oxide layer, the at least one metal-filled via connecting the MEMS resonator and the control circuit.

16. The method of claim 15, wherein the MEMS resonator includes a silicon resonator structure formed in the first silicon layer, and first and second electrodes formed in the first silicon layer.

17. The method of claim 16, wherein the at least one metal-filled via comprises a first metal-filled via that contacts the first electrode and a second metal-filled via that contacts the second electrode.

18. The method of claim 15, and further comprising:

forming at least one contact pad over the second silicon layer and connected to at least one metal-filled via that extends through the buried oxide layer and the second silicon layer.

19. The method of claim 15, wherein the first silicon layer is a first single crystal silicon layer, and the second silicon layer is an epitaxial silicon layer that is formed over a second single crystal silicon layer of the SOI substrate.

20. The method of claim 15, and further comprising:

forming a second MEMS resonator device in the first silicon layer of the substrate.

21. An integrated circuit, comprising:

a silicon-on-insulator (SOI) substrate;

a micro-electromechanical system (MEMS) resonator device integrated into a top-side silicon layer of the SOI substrate;

a CMOS circuit integrated into a bottom-side silicon layer and configured to control the MEMS resonator device; and

at least one metal-filled via in contact with at least one electrode of the MEMS resonator device, and extending through a buried oxide layer of the SOI substrate and the bottom-side silicon layer.