RECESS GATE TRANSISTOR
First Claim
1. A method of forming a semiconductor device, comprising:
- forming at least two trenches extending vertically from a bottom portion to an upper portion;
forming an insulating layer on the trenches including the trench walls;
forming a conductive layer on the insulating layer;
removing the conductive layer from the upper portion of the trenches, with a conductive layer pattern remaining at the bottom portion of the trenches;
depositing a buffer layer on the conductive layer patterns and the trench walls; and
filling the upper portions of the trenches with a capping layer.
1 Assignment
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Accused Products
Abstract
A method of forming a semiconductor device is provided, comprising forming a plurality of hard masks on a substrate by patterning an insulating layer; forming a plurality of trenches in the substrate, each trench having trench walls disposed between two adjacent masks and extending vertically from a bottom portion to an upper portion; forming an insulating layer on the hard masks and the trench walls; forming a conductive layer on the insulating layer; etching the conductive layer to form conductive layer patterns to fill the bottom portions of the trenches; depositing a buffer layer on the conductive layer patterns and the trench walls; and filling the upper portions of the trenches with a capping layer.
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Citations
38 Claims
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1. A method of forming a semiconductor device, comprising:
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forming at least two trenches extending vertically from a bottom portion to an upper portion; forming an insulating layer on the trenches including the trench walls; forming a conductive layer on the insulating layer; removing the conductive layer from the upper portion of the trenches, with a conductive layer pattern remaining at the bottom portion of the trenches; depositing a buffer layer on the conductive layer patterns and the trench walls; and filling the upper portions of the trenches with a capping layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor device, comprising:
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a substrate having a plurality of trenches, each of the trenches disposed between contacts formed on the top surface of an ILD layer formed on the substrate, each trench having trench walls and extending vertically from a bottom portion to an upper portion; an insulating layer formed on the trenches including the bottom portions and the trench walls; a conductive layer pattern formed at the bottom portion of each of the trenches; a buffer layer formed on the conductive layer pattern and the trench walls; and a cap formed on the buffer layer from above the conductive layer patterns to the top of the trenches. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A method of forming a semiconductor device, comprising:
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forming a plurality of hard masks on a substrate by patterning an insulating layer; forming a plurality of trenches in the substrate, each trench having trench walls disposed between a pair of masks and extending vertically from a bottom portion to an upper portion; forming an insulating layer on the trenches including the trench walls; forming a first conductive layer on the insulating layer; etching the first conductive layer to form first conductive layer patterns to fill the bottom portions of the trenches; forming a second conductive layer on the first conductive layer patterns; etching the second conductive layer to form second conductive layer patterns above the first conductive layer patterns; depositing a buffer layer on the second conductive layer patterns and the trench walls; and filling the upper portions of the trenches with a capping layer. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29)
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30. A method of forming a semiconductor device, comprising:
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forming a substrate and an active layer at a top portion of the substrate; forming a polysilicon layer on the active layer; forming a first insulation layer on the polysilicon layer; forming a plurality of masks by patterning the first insulating layer and the polysilicon layer; forming a plurality of trenches having trench walls in the substrate, each trench disposed between two adjacent masks and extending vertically from a bottom portion to an upper portion; forming a second insulating layer on the trench walls; forming a conductive layer on the second insulating layer; etching the conductive layer to form conductive layer patterns to fill the bottom portions of the trenches; depositing a buffer layer on the conductive layer patterns and the trench walls; filling the upper portions of the trenches with a capping layer; planarizing the capping layer, the buffer layer, and the hard masks to expose the active layer at the top portion of the substrate; forming an ILD layer on active layer, the buffer layer, and the capping layer; and etching the ILD layer above the active layer to form contact holes. - View Dependent Claims (31)
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32. A semiconductor memory card, comprising:
a memory controller and a memory device, the memory controller controls the memory device to read or write data from/into the memory in response to a read/write request of a host, wherein the memory device comprises;
a substrate having a plurality of trenches, each of the trenches disposed between contacts formed on the top surface of an ILD layer formed on the substrate, each trench having trench walls and extending vertically from a bottom portion to an upper portion;
an insulating layer formed on the trenches including the bottom portions and the trench walls;
a conductive layer pattern formed at the bottom portion of each of the trenches;
a buffer layer formed on the conductive layer pattern and the trench walls; and
a cap formed on the buffer layer from above the conductive layer patterns to the top of the trenches.- View Dependent Claims (33, 34, 35, 36)
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37. An electronic device comprising:
a controller having a processor;
an input/output (I/O) device;
a memory device; and
a wireless interface, wherein the I/O device includes a display, wherein the wireless interface transmits or receives data via a wireless communication network, and wherein the memory device comprises;
a substrate having a plurality of trenches, each of the trenches disposed between contacts formed on the top surface of an ILD layer formed on the substrate, each trench having trench walls and extending vertically from a bottom portion to an upper portion;
an insulating layer formed on the trenches including the bottom portions and the trench walls;
a conductive layer pattern formed at the bottom portion of each of the trenches;
a buffer layer formed on the conductive layer pattern and the trench walls; and
a cap formed on the buffer layer from above the conductive layer patterns to the top of the trenches.- View Dependent Claims (38)
Specification