One-Mask MTJ Integration for STT MRAM
First Claim
1. A method for integrating a magnetic tunnel junction (MTJ) device into an integrated circuit comprising:
- providing in a semiconductor back-end-of-line (BEOL) process flow a substrate having a first interlevel dielectric layer and at least a first metal interconnect;
depositing over the first interlevel dielectric layer and the first metal interconnect a plurality of magnetic tunnel junction material layers; and
defining from the plurality of material layers a magnetic tunnel junction stack coupled to the first metal interconnect using a single mask process, the magnetic tunnel junction stack being integrated into the integrated circuit.
1 Assignment
0 Petitions
Accused Products
Abstract
A method for integrating a magnetic tunnel junction (MTJ) device into an integrated circuit includes providing in a semiconductor back-end-of-line (BEOL) process flow a substrate having a first interlevel dielectric layer and at least a first metal interconnect. Over the first interlevel dielectric layer and the first metal interconnect, magnetic tunnel junction material layers are deposited. From the material layers a magnetic tunnel junction stack, coupled to the first metal interconnect, is defined using a single mask process. The magnetic tunnel junction stack is integrated into the integrated circuit.
-
Citations
25 Claims
-
1. A method for integrating a magnetic tunnel junction (MTJ) device into an integrated circuit comprising:
-
providing in a semiconductor back-end-of-line (BEOL) process flow a substrate having a first interlevel dielectric layer and at least a first metal interconnect; depositing over the first interlevel dielectric layer and the first metal interconnect a plurality of magnetic tunnel junction material layers; and defining from the plurality of material layers a magnetic tunnel junction stack coupled to the first metal interconnect using a single mask process, the magnetic tunnel junction stack being integrated into the integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
-
12. A magnetic tunnel junction device in an integrated circuit (IC) including at least a magnetic random access memory (MRAM) comprising:
-
a substrate comprising a first metal interconnect; a magnetic tunnel junction stack communicating with the first metal interconnect, the magnetic tunnel junction stack having been defined using a single mask process; and a second metal interconnect in communication with the magnetic tunnel junction stack, wherein the magnetic tunnel device is integrated into the IC. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
-
-
20. A method for integrating a magnetic tunnel junction (MTJ) device into an integrated circuit comprising the steps of:
-
providing in a back-end-of-line (BEOL) process flow a substrate having a first interlevel dielectric layer and at least a first metal interconnect; depositing over the first interlevel dielectric layer and the first metal interconnect a plurality of magnetic tunnel junction material layers; and defining from the plurality of material layers a magnetic tunnel junction stack coupled to the first metal interconnect using a single mask process, the magnetic tunnel junction stack being integrated into the integrated circuit. - View Dependent Claims (21)
-
-
22. A magnetic tunnel junction (MTJ) structure for magnetic random access memory (MRAM) comprising:
-
a first interconnect means for communicating with at least one control device; a first electrode means for coupling to the first interconnect means; an MTJ means for storing data, the MTJ means coupling to the first electrode means; a second electrode means for coupling to the MTJ means, the first and second electrode means having a same lateral dimension as the MTJ means based upon a first mask; and a second interconnect means for coupling to the second electrode means and at least one other control device. - View Dependent Claims (23, 24, 25)
-
Specification