Chip mounting device and chip package array

• US 20090261463A1
• Filed: 06/03/2008
• Published: 10/22/2009
• Est. Priority Date: 04/16/2008
• Status: Abandoned Application

• Current Assignee: Powertech Technology Inc
• Original Assignee: Powertech Technology Inc
• Inventors: Wang, Chin-Fa, Chen, Chin-Ti
• Application Number:
  US12/155,350
• Publication Number:
  US 20090261463A1
• Time in Patent Office: Days
• US Class Current: 257/676
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/49565 Side rails of the lead frame, e.g. with perforations, sprocket holes
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01057 Lanthanum [La]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/207 Diameter ranges

Abstract

A chip mounting device includes at least one chip mounting unit and at least one side rail configured beside the chip mounting unit. The chip mounting unit includes a die pad and a plurality of conductive contacts. The side rail includes at least one identifying element. A chip package array with the above-mentioned chip mounting device is also disclosed. The chip mounting device and chip package array includes the identifying element configured on the side rail to improve the identification of semi-finished packaged chips during chip package process to be read automatically by machines instead of operators, and further decrease the loss caused by misjudgments of operators.

Claims

1. A chip mounting device, comprising:

at least one chip mounting unit comprising a die pad and a plurality of conductive contacts; and

at least one side rail configured beside said chip mounting unit and arranging at least one identifying element thereon.

2. The chip mounting device as claimed in claim 1, wherein said identifying element is read by an identifying sensor.

3. The chip mounting device according to claim 1, wherein said identifying element comprises at least one hole.

4. The chip mounting device according to claim 3, wherein said identifying element is binary encoded.

5. The chip mounting device according to claim 1, wherein said identifying element comprises a tag, a mark, or a notch.

6. The chip mounting device according to claim 1, wherein said identifying element records information about chip types or package process.

7. The chip mounting device according to claim 1, wherein said chip mounting device is a leadframe arranging a plurality of leads as said conductive contacts.

8. The chip mounting device according to claim 1, wherein said chip mounting device is a package substrate arranging a plurality of bonding pads thereon as said conductive contacts.

9. The chip mounting device according to claim 8, wherein said package substrate is selected from a group consisted of a soft substrate, a hard substrate and a composite substrate.

10. A chip package array, comprising:

a chip mounting device, comprising;

at least one chip mounting unit comprising a die pad and a plurality of conductive contacts; and

at least one side rail configured beside said chip mounting unit and arranging at least one identifying element thereon; and

at least one chip mounted on said die pad and electrically connected to said conductive contacts.

11. The chip package array according to claim 10, wherein said identifying element is read by an identifying sensor.

12. The chip package array according to claim 10, wherein said identifying element comprises at least one hole.

13. The chip package array according to claim 12, wherein said identifying element is binary encoded.

14. The chip package array according to claim 10, wherein said identifying element comprises a tag, a mark, or a notch.

15. The chip package array according to claim 10, wherein said identifying element records information about chip types or package process.

16. The chip package array according to claim 10, wherein said chip mounting device is a leadframe arranging a plurality of leads as said conductive contacts.

17. The chip package array according to claim 10, wherein said chip mounting device is a package substrate arranging a plurality of bonding pads thereon as said conductive contacts.

18. The chip package array as claimed in claim 10, wherein said package substrate is selected from a group consisted of a soft substrate, a hard substrate and a composite substrate.

19. The chip package array according to claim 10, further comprising a plurality of wires, wherein said chip comprises an active surface and a back surface opposite to said active surface, said chip is mounted onto said chip mounting unit with said back surface, and said wires are electrically connected to said active surface of said chip and said conductive contacts.

20. said chip package array according to claim 19, further comprising a molding compound covering said chip, said wires, and said conductive contacts.

21. The chip package array according to claim 10, further comprising a plurality of conductive bumps, wherein said chip comprises an active surface and a back surface opposite to said active surface, said chip is mounted onto said chip package unit with said active surface, and said conductive bumps are electrically connected to said active surface of said chip and said conductive contacts.

22. The chip package array according to claim 21, further comprising a molding compound covering said chip, said wires, and said conductive contacts.