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Computation spreading utilizing dithering for spur reduction in a digital phase lock loop

  • US 20090262877A1
  • Filed: 04/17/2008
  • Published: 10/22/2009
  • Est. Priority Date: 04/17/2008
  • Status: Active Grant
First Claim
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1. A method of reducing the generation of frequency spurs in the performance of a processing task normally performed within a reference clock period, said method comprising the steps of:

  • dividing said task into a plurality of atomic operation computations for execution in a software loop;

    randomizing the execution of one or more atomic operations in each iteration of said software loop; and

    wherein said atomic operations are clocked using a processor clock having a frequency significantly higher than that of said reference clock.

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