MICROCRYSTALLINE SILICON DEPOSITION FOR THIN FILM SOLAR APPLICATIONS

• US 20090263930A1
• Filed: 06/26/2009
• Published: 10/22/2009
• Est. Priority Date: 10/22/2007
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Choi, Soo Young, Sheng, Shuran, CHAE, YONG KEE
• Granted Patent: US 7,919,398 B2
• Time in Patent Office: Days
• US Class Current: 438/96
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02573 Conductivity type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 31/03685 including microcrystalline silicon, uc-Si
• CPC Class Codes: H01L 31/075 the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
• CPC Class Codes: H01L 31/076 Multiple junction or tandem solar cells
• CPC Class Codes: H01L 31/1824 Special manufacturing methods for microcrystalline Si, uc-Si
• CPC Class Codes: Y02E 10/545 Microcrystalline silicon PV cells
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Embodiments of the invention as recited in the claims relate to thin film multi-junction solar cells and methods and apparatuses for forming the same. In one embodiment a method of forming a thin film multi-junction solar cell over a substrate is provided. The method comprises positioning a substrate in a reaction zone, providing a gas mixture to the reaction zone, wherein the gas mixture comprises a silicon containing compound and hydrogen gas, forming a first region of an intrinsic type microcrystalline silicon layer on the substrate at a first deposition rate, forming a second region of the intrinsic type microcrystalline silicon layer on the substrate at a second deposition rate higher than the first deposition rate, and forming a third region of the intrinsic type microcrystalline silicon layer on the substrate at a third deposition rate lower than the second deposition rate.

Claims

1. A method of forming a thin film multi-junction solar cell over a substrate, comprising:

forming a first p-i-n junction, comprising;

forming a p-type amorphous silicon layer over the substrate;

forming an intrinsic type amorphous silicon layer over the p-type amorphous silicon layer; and

forming a first n-type silicon layer over the intrinsic type amorphous silicon layer; and

forming a second p-i-n junction over the first p-i-n junction, comprising;

forming a p-type microcrystalline silicon layer;

forming an intrinsic type microcrystalline silicon layer over the p-type microcrystalline silicon layer, wherein forming the intrinsic type microcrystalline silicon layer comprises;

forming a first region of the intrinsic type microcrystalline silicon layer at a first deposition rate;

forming a second region of the intrinsic type microcrystalline silicon layer over the first region of the intrinsic type microcrystalline silicon layer at a second deposition rate higher than the first deposition rate; and

forming a third region of the intrinsic type microcrystalline silicon layer over the second region of the intrinsic type microcrystalline silicon layer at a third deposition rate lower than the second deposition rate; and

forming a second n-type silicon layer over the intrinsic type microcrystalline layer.

2. The method of claim 1, wherein the first p-i-n junction is formed over a tin oxide transparent conducting oxide layer.

3. The method of claim 1, wherein the first region of the intrinsic type microcrystalline silicon layer is formed to a thickness between about 10 Å

and about 500 Å

, wherein the second region of the intrinsic type microcrystalline silicon layer is formed to a thickness between about 10,000 Å and

about 30,000 Å

, and wherein the third region of the intrinsic type microcrystalline silicon layer is formed to a thickness between about 10 Å and

about 500 Å

.

4. The method of claim 1, wherein the first deposition rate is between about 100 Å

/minute and about 350 Å

/minute, wherein the second deposition rate is between about 400 Å

/minute and about 1500 Å

/minute, and wherein the third deposition rate is between about 100 Å

/minute and about 350 Å

/minute.

5. The method of claim 1, wherein the p-type amorphous silicon layer of the first p-i-n junction is formed to a thickness between about 60 Å

and about 300 Å

;

wherein the intrinsic type amorphous silicon layer of the first p-i-n junction is formed to a thickness between about 1,500 Å and

about 3,500 Å

; and

wherein the n-type silicon layer of the first p-i-n junction is formed to a thickness between about 100 Å and

about 400 Å

.

6. The method of claim 1, wherein the p-type microcrystalline silicon layer of the second p-i-n junction is formed to a thickness between about 100 Å

and about 400 Å

;

wherein the intrinsic type microcrystalline silicon layer of the second p-i-n junction is formed to a thickness between about 10,000 Å and

about 30,000 Å

; and

wherein the second n-type silicon layer is formed to a thickness between about 100 Å and

about 500 Å

.

7. The method of claim 1, wherein the first p-i-n junction is formed in a first process system comprising a first process chamber and a second process chamber.

8. The method of claim 7, wherein the p-type amorphous silicon layer of the first p-i-n junction is formed in the first process chamber of the first process system and wherein the intrinsic type amorphous silicon layer and the n-type silicon layer are formed in the second process chamber of the first process system.

9. The method of claim 7, wherein the second p-i-n junction is formed in a second process system comprising a first process chamber and a second process chamber.

10. The method of claim 9, wherein the p-type microcrystalline silicon layer of the second p-i-n junction is formed in the first process chamber of the second process system and wherein the intrinsic type microcrystalline silicon layer and the second n-type silicon layer of the second p-i-n junction is formed in the second chamber of the second process system.

11. The method of claim 1, wherein the first n-type silicon layer and the second n-type silicon layer are an n-type amorphous silicon layer or an n-type microcrystalline silicon layer.

12. The method of claim 1, wherein the first n-type silicon layer is a dual layer structure comprising an n-type amorphous silicon layer and an n-type microcrystalline silicon layer with the n-type amorphous silicon layer deposited on the intrinsic type amorphous silicon layer.

13. A method of forming a thin film multi-junction solar cell over a substrate, comprising:

positioning a substrate in a reaction zone;

forming a first p-i-n junction over the substrate, comprising;

providing a silicon containing gas at a flow rate between about 10 sccm/L and about 200 sccm/L, hydrogen gas at a flow rate between about 100 sccm/L and about 1,000 sccm/L, a p-type dopant between about 0.05 sccm/L and about 1 sccm/L, and RF power between 15 milliWatts/cm² and about 200 milliWatts/cm² to form a p-type amorphous silicon layer over the substrate;

providing a silicon containing gas at a flow rate between about 100 sccm/L and about 200 sccm/L, hydrogen gas at a flow rate between about 100 sccm/L and about 3,000 sccm/L, and RF power between 15 milliWatts/cm² and about 250 milliWatts/cm² to form an intrinsic type amorphous silicon layer over the p-type amorphous silicon layer;

providing a silicon containing gas at a flow rate between about 1 sccm/L and about 250 sccm/L, hydrogen gas between about 100 sccm/L and about 5,000 sccm/L, an n-type dopant between 0.005 sccm/L and about 0.015 sccm/L to form an n-type silicon layer over the intrinsic type amorphous silicon layer; and

forming a second p-i-n junction over the first p-i-n junction, comprising;

providing a silicon containing gas at a flow rate between 1 sccm/L and about 20 sccm/L, hydrogen gas at a flow rate between 100 sccm/L and about 6,000 sccm/L, a p-type dopant at a flow rate between 0.005 sccm/L and about 0.05 sccm/L, RF power between 50 milliWatts/cm² and about 700 milliWatts/cm² to form a p-type microcrystalline silicon layer over the n-type silicon layer;

providing a silicon containing gas at a flow rate between about 1,000 sccm and about 3,000 sccm, hydrogen gas at a flow rate between about 100,000 sccm and about 300,000 sccm, and RF power between 0.2 Watts/cm² and about 0.6 Watts/cm² to form a first region of the intrinsic type microcrystalline silicon layer over the p-type microcrystalline silicon layer;

providing a silicon containing gas at a flow rate between about 1,000 sccm and about 6,000 sccm, hydrogen gas at a flow rate between about 200,000 sccm and about 600,000 sccm, and RF power between 0.6 Watts/cm² and about 0.9 Watts/cm² to form a second region of the intrinsic type microcrystalline silicon layer over the first region of the intrinsic type microcrystalline silicon layer;

providing a silicon containing gas at a flow rate between about 1,000 sccm and about 3,000 sccm, hydrogen gas at a flow rate between about 100,000 sccm and about 300,000 sccm, and RF power between 0.2 Watts/cm² and about 0.6 Watts/cm² to form a third region of the intrinsic type microcrystalline silicon layer over the second region of the intrinsic type microcrystalline silicon layer; and

providing a silicon containing gas at a flow rate between about 100 sccm/L and about 300 sccm/L, hydrogen gas at a flow rate between about 100 sccm/L and about 2000 sccm/L, an n-type dopant between about 0.05 sccm/L and about 1.5 sccm/L, and RF power between about 100 milliWatts/cm² and about 900 milliWatts/cm² to form an n-type silicon layer over the intrinsic type microcrystalline silicon layer.

14. The method of claim 13, wherein the first region of the intrinsic type microcrystalline silicon layer is formed to a thickness between about 10 Å

and about 500 Å

, wherein the second region of the intrinsic type microcrystalline silicon layer is formed to a thickness between about 10,000 Å and

about 30,000 Å

, and wherein the third region of the intrinsic type microcrystalline silicon layer is formed to a thickness between about 10 Å and

about 500 Å

.

15. The method of claim 13, wherein the silicon containing gas is selected from the group consisting of silane (SiH₄), disilane (Si₂H₆), silicon tetrafluoride (SiF₄), silicon tetrachloride (SiCl₄), dichlorosilane (SiH₂Cl₂), and combinations thereof.

16. The method of claim 15, wherein the p-type dopant is selected from the group comprising aluminum, trimethylboron (TMB or B(CH₃)₃), diborane (B₂H₆), and BF₃, B(C₂H₅)₃ and the n-type dopant is a Group V element selected from the group comprising phosphorous, arsenic, and antimony.

17. The method of claim 13, wherein the first p-i-n junction is formed in a first process system comprising a first process chamber and a second process chamber.

18. The method of claim 17, wherein the p-type amorphous silicon layer of the first p-i-n junction is formed in the first process chamber of the first process system and wherein the intrinsic type amorphous silicon layer and the n-type silicon layer are formed in the second process chamber of the first process system.

19. The method of claim 17, wherein the second p-i-n junction is formed in a second process system comprising a first process chamber and a second process chamber.

20. The method of claim 19, wherein the p-type microcrystalline silicon layer of the second p-i-n junction is formed in the first process chamber of the second process system and wherein the intrinsic type microcrystalline silicon layer and the n-type microcrystalline or amorphous silicon layer of the second p-i-n junction is formed in the second chamber of the second process system.