SERIES REGULATOR WITH OVER CURRENT PROTECTION CIRCUIT

• US 20090273323A1
• Filed: 07/16/2009
• Published: 11/05/2009
• Est. Priority Date: 09/13/2007
• Status: Active Grant

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: KIMURA, Hiroyuki
• Granted Patent: US 8,174,251 B2
• Time in Patent Office: Days
• US Class Current: 323/265
• CPC Class Codes: G05F 1/56 using semiconductor devices in series with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit

Abstract

A series regulator with an over current protection circuit regulates output current at an output terminal by controlling an output transistor. There is a current sense transistor with a conductivity that is dependent on the conductivity of the output transistor. A current limiting transistor is connected between an input power supply terminal and a differential amplifier output that controls the conductivity of the output transistor. A current supply source provides current to a constant current source and a converter output of a current to voltage converter. The converter output is connected to a control electrode of the current limiting transistor. A first differential transistor couples the current sense transistor to the constant current source and a second differential transistor couples the current supply source to the constant current source. In operation, the current sense transistor controls the conductivity of the second differential transistor thereby varying a control current supplied from the current supply source to the constant current source. When the control current matches a limiting threshold value, a voltage control signal at the converter output controls the current limiting transistor to thereby limit maximum current flow through the output transistor.

Claims

1. A series regulator with an over current protection circuit, wherein the series regulator receives an input voltage at an input power supply terminal and generates an output voltage and an output current at an output terminal, the series regulator comprising:

a differential amplifier having an inverting input that receives a reference voltage, a non-inverting input, and a differential amplifier output;

an output transistor connected between the input power supply terminal and the output terminal, wherein a control electrode of the output transistor is connected to the differential amplifier output;

a current sense transistor having a source electrode connected to the input power supply terminal, and a control electrode connected to the differential amplifier output, wherein the conductivity of the current sense transistor is dependent on the conductivity of the output transistor;

a current limiting transistor connected between the input power supply terminal and the differential amplifier output;

an attenuator circuit connected between the output terminal and a power supply reference terminal, the attenuator circuit having an attenuator output connected to the non-inverting input of the differential amplifier, the attenuator output providing a voltage signal proportional to the output voltage at the output terminal;

a first constant current source connected to the input power supply terminal;

a second constant current source connected to the power supply reference terminal;

a differential transistor pair comprising a first differential transistor with a control electrode coupled to a drain electrode of the current sense transistor, the first differential transistor coupling the current sense transistor to the second constant current source, the differential transistor pair comprising a second differential transistor with a control electrode coupled to the output terminal, the second differential transistor coupling an output of the first constant current source to the second constant current source; and

a current to voltage converter coupling the output of first constant current source to the power supply reference terminal, the current to voltage converter having a converter output coupled to a control electrode of the current limiting transistor,

wherein, in operation, the current sense transistor controls the conductivity of the second differential transistor thereby varying a control current supplied from the first constant current source to the current to voltage converter, and wherein when the control current matches a limiting threshold value, a voltage control signal at the converter output controls the current limiting transistor to thereby limit maximum current flow through the output transistor.

2. The series regulator of claim 1, wherein the current to voltage converter comprises a cascode transistor series coupled to a third constant current source, the third constant current source being connected to the power supply reference terminal and the cascode transistor being connected to the output of the first constant current source, and wherein the converter output is provided by a common node of the cascode transistor and third constant current source.

3. The series regulator of claim 1, wherein the attenuator circuit includes a voltage divider with at least two series connected resistors with a common node providing the attenuator output.

4. The series regulator of claim 1, wherein the second constant current source is a controllable constant current source having a current source control input coupled to the attenuator output.

5. The series regulator of claim 4, wherein the controllable constant current source includes:

a current source control transistor with a control electrode coupled to the attenuator output;

a directly coupled current source coupling the power supply reference terminal to the differential transistor pair; and

a selectable coupled current source coupled to the power supply reference terminal and coupled to the differential transistor pair through the current source control transistor.

6. The series regulator of claim 5, wherein when the output voltage at the output terminal falls below the limiting threshold value, the controllable constant current source provides a reduced constant current flowing through the short current limit transistor, the reduced constant current being dependent on the voltage signal at the attenuator output.

7. The series regulator of claim 6, wherein there is a short current limit transistor coupled across the differential transistor pair.

8. The series regulator of claim 7, wherein the short current limit transistor has a control electrode coupled to a reference voltage, the short current limit reference voltage being selected to bias the short current limit transistor into a conductive state when the output voltage at the output terminal is below the limiting threshold value that biases the second differential transistor to a non-conductive state.

9. The series regulator of claim 8, wherein the reduced constant current reduces a sense current flowing through the current sense transistor thereby reducing the current flow through the output transistor.

10. A series regulator with an over current protection circuit, wherein the series regulator receives an input voltage at an input power supply terminal and generates an output voltage and an output current at an output terminal, the series regulator comprising:

a differential amplifier having an inverting input that receives a reference voltage, a non-inverting input, and a differential amplifier output;

an output transistor connected between the input power supply terminal and the output terminal, wherein a control electrode of the output transistor is connected to the differential amplifier output;

a current sense transistor having a source electrode connected to the input power supply terminal, and a control electrode connected to the differential amplifier output, wherein the conductivity of the current sense transistor is dependent on the conductivity of the output transistor;

a current limiting transistor connected between the input power supply terminal and the differential amplifier output;

an attenuator circuit connected between the output terminal and a power supply reference terminal, the attenuator circuit having an attenuator output connected to the non-inverting input of the differential amplifier, the attenuator output providing a voltage signal proportional to the output voltage at the output terminal;

a current mirror having an input connected to the input power supply terminal, the current mirror having two current supplying outputs;

a first constant current source with a first node connected to the power supply reference;

a second constant current source with a first node connected to the power supply reference terminal and a second node connected to both the first one of the current supplying outputs of the current mirror and the control electrode of the current limiting transistor; and

a differential transistor pair comprising a first differential transistor with a control electrode coupled to a drain electrode of the current sense transistor, the first differential transistor coupling the current sense transistor to the first constant current source, the differential transistor pair comprising a second differential transistor with a control electrode coupled to the output terminal, the second differential transistor coupling a second one of the two current supplying outputs of the current mirror to the second constant current source,

wherein, in operation, the current sense transistor controls the conductivity of the second differential transistor thereby varying a control current supplied from the second one of the two current supplying outputs of the current mirror to the second constant current source, and wherein when the control current matches a limiting threshold value, a voltage control signal at the second one of the two current supplying outputs of the current mirror controls the current limiting transistor to thereby limit maximum current flow through the output transistor.

11. The series regulator of claim 10, wherein the attenuator circuit includes a voltage divider with at least two series connected resistors with a common node providing the attenuator output.

12. The series regulator of claim 10, wherein the first constant current source is a controllable constant current source having a current source control input coupled to the attenuator output.

13. The series regulator of claim 12, wherein the controllable constant current source includes:

a current source control transistor with a control electrode coupled to the attenuator output;

a directly coupled current source coupling the power supply reference terminal to the differential transistor pair; and

a selectable coupled current source coupled to the power supply reference terminal and coupled to the differential transistor pair through the current source control transistor.

14. The series regulator of claim 13, wherein when the output voltage at the output terminal falls below a limiting threshold value, the controllable constant current source provides a reduced constant current flowing through the short current limit transistor, the reduced constant current being dependent on the voltage signal at the attenuator output.

15. The series regulator of claim 14, wherein there is a short current limit transistor coupled across differential transistor pair.

16. The series regulator of claim 15, wherein the short current limit transistor has a control electrode coupled to a reference voltage, the reference voltage being selected to bias the short current limit transistor into a conductive state when the output voltage at the output terminal falls below the limiting threshold value that biases the second differential transistor to a non-conductive state.

17. A series regulator with an over current protection circuit, wherein the series regulator receives an input voltage at an input power supply terminal and generates an output voltage and an output current at an output terminal, the series regulator comprising:

a differential amplifier having an inverting input that receives a reference voltage, a non-inverting input, and a differential amplifier output;

an output transistor connected between the input power supply terminal and the output terminal, wherein a control electrode of the output transistor is connected to the differential amplifier output;

a current sense transistor having a source electrode connected to the input power supply terminal, and a control electrode connected to the differential amplifier output, wherein the conductivity of the current sense transistor is dependent on the conductivity of the output transistor;

a current limiting transistor connected between the input power supply terminal and the differential amplifier output;

an attenuator circuit connected between the output terminal and a power supply reference terminal, the attenuator circuit having an attenuator output connected to the non-inverting input of the differential amplifier, the attenuator output providing a voltage signal proportional to the output voltage at the output terminal;

a current supply source providing current to both a constant current source and a converter output of a current to voltage converter, the converter output being connected to a control electrode of the current limiting transistor; and

a differential transistor pair comprising a first differential transistor with a control electrode coupled to a drain electrode of the current sense transistor, the first differential transistor coupling the current sense transistor to the constant current source, the differential transistor pair comprising a second differential transistor with a control electrode coupled to the output terminal, the second differential transistor coupling the current supply source to the constant current source,

wherein, in operation, the current sense transistor controls the conductivity of the second differential transistor thereby varying a control current supplied from the current supply source to the constant current source, and wherein when the control current matches a limiting threshold value, a voltage control signal at the converter output controls the current limiting transistor to thereby limit maximum current flow through the output transistor.

18. The series regulator of claim 17, wherein the constant current source is a controllable constant current source having a current source control input coupled to the attenuator output.

19. The series regulator of claim 18, wherein the controllable constant current source includes:

a current source control transistor with a control electrode coupled to the attenuator output;

a directly coupled current source coupling the power supply reference terminal to the differential transistor pair; and

a selectable coupled current source coupled to the power supply reference terminal and coupled to the differential transistor pair through the current source control transistor.

20. The series regulator of claim 19, wherein when the output voltage at the output terminal falls below a limiting threshold value, the controllable constant current source provides a reduced constant current flowing through the short current limit transistor, the reduced constant current being dependent on the voltage signal at the attenuator output.