FAULT DETECTION FOR BATTERY CHARGERS
First Claim
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1. A method comprising:
- sensing a charge current applied to a battery with a resistive element;
measuring a voltage across the resistive element;
generating a trigger signal when the measured voltage across the resistive element exceeds a predetermined value;
generating from the trigger signal an interrupt signal for a microprocessor; and
initiating an over-current handling routine in the microprocessor.
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Abstract
A method of fault detection for battery chargers includes sensing a charge current applied to a battery with a resistive element. The method includes measuring a voltage across the resistive element. The method includes generating a trigger signal when the measured voltage across the resistive element exceeds a predetermined value. The method includes generating from the trigger signal an interrupt signal for a microprocessor. The method includes initiating an over-current handling routine in the microprocessor.
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Citations
18 Claims
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1. A method comprising:
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sensing a charge current applied to a battery with a resistive element; measuring a voltage across the resistive element; generating a trigger signal when the measured voltage across the resistive element exceeds a predetermined value; generating from the trigger signal an interrupt signal for a microprocessor; and initiating an over-current handling routine in the microprocessor. - View Dependent Claims (2, 3, 4, 5)
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6. A method comprising:
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sensing a charge current applied to a battery with a resistive element; measuring a voltage across the resistive element; generating a trigger signal when the measured voltage across the resistive element exceeds a predetermined value; coupling the trigger signal to a data bus that is configured to be polled by a microprocessor; and initiating an over-current handling routine in the microprocessor. - View Dependent Claims (7, 8, 9)
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10. An apparatus comprising:
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a battery charging station; a resistive element coupled to the battery charging station for sensing a charge current generated by the battery charging station; a comparator having a first input coupled to a first terminal of the resistive element and having a second input coupled to a second terminal of the resistive element, and wherein the first terminal of the comparator is coupled to a reference voltage; and a microprocessor having an interrupt input coupled to an output of the comparator. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. An apparatus comprising:
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a plurality of battery charging stations; a plurality of resistive elements wherein a resistive element is coupled to a battery charging station for sensing a charge current generated by the battery charging station; a plurality of comparators wherein a given comparator is associated with a corresponding resistive element selected from the plurality of resistive elements, the given comparator has a first input coupled to a first terminal of the corresponding resistive element and has a second input coupled to a second terminal of the corresponding resistive element, and wherein the first terminal of the given comparator is coupled to a reference voltage; a microprocessor having an interrupt input; and wherein the plurality of comparators includes multiple comparators each having an output coupled to the interrupt input of the microprocessor.
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18. An apparatus comprising:
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a plurality of battery charging stations; a plurality of resistive elements wherein a resistive element is coupled to a battery charging station for sensing a charge current generated by the battery charging station; a plurality of comparators wherein a given comparator is associated with a corresponding resistive element selected from the plurality of resistive elements, the given comparator has a first input coupled to a first terminal of the corresponding resistive element and has a second input coupled to a second terminal of the corresponding resistive element, and wherein the first terminal of the given comparator is coupled to a reference voltage; a microprocessor; a data bus that is configured to be polled by the microprocessor; and wherein the plurality of comparators includes multiple comparators each having an output coupled to the data bus.
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Specification