Data Transmission Device and Related Method

• US 20090274241A1
• Filed: 07/18/2008
• Published: 11/05/2009
• Est. Priority Date: 04/30/2008
• Status: Abandoned Application

• Current Assignee: Novatek Microelectronics Corporation (Novatek Microelectronics Corp Limited)
• Original Assignee: Novatek Microelectronics Corporation (Novatek Microelectronics Corp Limited)
• Inventors: Lin, Che-Li, Tsao, Wen-Yuan
• Application Number:
  US12/175,463
• Publication Number:
  US 20090274241A1
• Time in Patent Office: Days
• US Class Current: 375/295
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 5/18 Timing circuits for raster scan displays specially adapted for television H04N ; synchronisation between the display unit and other display units, videodisc player G09G5/12
• CPC Class Codes: H04L 25/0272 Arrangements for coupling to multiple lines, e.g. for differential transmission

Abstract

In order to resolve problems of clock and data skews in transmission signals in a display device, the present invention provides a data transmission device including a timing controller, a plurality of source drivers and a plurality of transmission line sets. The timing controller generates a plurality of definable signals each generating at least four voltage levels. The plurality of source drivers receives the plurality of definable signals. The plurality of transmission line sets are coupled between the timing controller and the plurality of source drivers and used for transmitting the plurality of definable signals. Preferably, the plurality of definable signals are differential signals.

Claims

1. A data transmission device for a display device, the data transmission device comprising:

a timing controller for generating a plurality of definable signals each generating at least four voltage levels;

a plurality of source drivers for receiving the plurality of definable signals; and

a plurality of transmission line sets coupled between the timing controller and the plurality of source drivers, for transmitting the plurality of definable signals.

2. The data transmission device of claim 1, wherein the plurality of definable signals is differential signals.

3. The data transmission device of claim 1, wherein the plurality of definable signals are defined as data signals, and the timing controller transmits the data signals to the plurality of source drivers via the plurality of transmission line sets arranged to dedicated channel architecture.

4. The data transmission device of claim 1, wherein the timing controller further generates a clock signal with differential signal form and transmits the clock signal to the plurality of source drivers in a cascading, bus, or dedicated channel manner or in a manner combining any of the cascading, bus, and dedicated channel manners.

5. The data transmission device of claim 1, wherein each of the plurality of definable signals generates four voltage levels, and each of the plurality of transmission line sets comprises two differential signaling line pairs.

6. The data transmission device of claim 1, wherein each of the plurality of definable signals generates six voltage levels, and each of the plurality of transmission line sets comprises three differential signaling line pairs.

7. The data transmission device of claim 1, wherein the timing controller further generates at least a definable single-ended signal defined as a clock signal, an output setup signal, or a polarity signal.

8. The data transmission device of claim 7, wherein the at least a definable single is a transistor-to-transistor logic (TTL) signal.

9. The data transmission device of claim 7, wherein the at least a definable single is transmitted between the timing controller and the plurality of source drivers in a cascading, bus, or dedicated channel manner or in a manner combining any of the cascading, bus, and dedicated channel manners.

10. A data transmission method for a display device, the data transmission method comprising:

generating a plurality of definable signals each generating at least four voltage levels; and

transmitting the plurality of definable signals via a plurality of transmission line sets.

11. The data transmission method of claim 10, wherein the plurality of definable signals are differential signals.

12. The data transmission method of claim 10 further comprising:

defining the plurality of definable signals as data signals; and

transmitting the data signals via the plurality of transmission line sets arranged to dedicated channel architecture.

13. The data transmission method of claim 10 further comprising:

generating a clock signal with differential signal form; and

transmitting the clock signal in a cascading, bus, or dedicated channel manner or in a manner combining any of the cascading, bus, and dedicated channel manners.

14. The data transmission method of claim 10, wherein each of the plurality of definable signals generates four voltage levels, and each of the plurality of transmission line sets comprises two differential signaling line pairs.

15. The data transmission method of claim 10, wherein each of the plurality of definable signals generates six voltage levels, and each of the plurality of transmission line sets comprises three differential signaling line pairs.

16. The data transmission method of claim 10 further comprising generating at least a definable single-ended signal defined as a clock signal, an output setup signal, or a polarity signal.

17. The data transmission method of claim 16, wherein the at least a definable single is a transistor-to-transistor logic (TTL) signal.

18. The data transmission method of claim 16 further comprising transmitting the least a definable single in a cascading, bus, or dedicated channel manner or in a manner combining any of the cascading, bus, and dedicated channel manners.

19. A data transmission device for a display device, the data transmission device comprising:

a timing controller for generating a plurality of differential signals each generating at least four voltage levels;

a plurality of source drivers for receiving the plurality of differential signals; and

a plurality of transmission line sets coupled between the timing controller and the plurality of source drivers in a dedicated channel manner, for transmitting the plurality of differential signals.

20. The data transmission device of claim 19, wherein each of the plurality of differential signals generates four voltage levels, and each of the plurality of transmission line sets comprises two differential signaling line pairs.

21. The data transmission device of claim 19, wherein each of the plurality of differential signals generates six voltage levels, and each of the plurality of transmission line sets comprises three differential signaling line pairs.

22. A data transmission method for a display device comprising a timing controller and a plurality of source drivers, the data transmission method comprising:

generating a plurality of differential signals each generating at least four voltage levels; and

transmitting the plurality of differential signals between the timing controller and the plurality of source drivers via a plurality of transmission line sets in a dedicated channel manner.

23. The data transmission method of claim 22, wherein each of the plurality of differential signals generates four voltage levels, and each of the plurality of transmission line sets comprises two differential signaling line pairs.

24. The data transmission method of claim 22, wherein each of the plurality of differential signals generates six voltage levels, and each of the plurality of transmission line sets comprises three differential signaling line pairs.