METHOD AND APPARATUS FOR MANUFACTURING DEVICE

• US 20090275146A1
• Filed: 04/22/2009
• Published: 11/05/2009
• Est. Priority Date: 04/23/2008
• Status: Abandoned Application

• Current Assignee: Seiko Epson Corporation (Seiko Group), Ulvac Incorporated
• Original Assignee: Seiko Epson Corporation (Seiko Group), Ulvac Incorporated
• Inventors: NAKAMURA, Toshiyuki, MIYAZAKI, Toshiya, UEDA, Masahisa, ENDOU, Mitsuhiro, KOKUBUN, Takeshi, TAKANO, Katsuo, KOKAZE, Yutaka, SUU, Koukou
• Application Number:
  US12/428,096
• Publication Number:
  US 20090275146A1
• Time in Patent Office: Days
• US Class Current: 438/3
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/31122 of layers not containing Si, e.g. PZT, Al2O3
• CPC Class Codes: H01L 21/32135 by vapour etching only
• CPC Class Codes: H01L 28/55 with a dielectric comprising a perovskite structure material

Abstract

A method for manufacturing a device, includes: (A) forming a first electrode layer on a substrate; (B) forming a ferroelectric layer on the first electrode layer; (C) forming a second electrode layer on the ferroelectric layer; (D) forming a mask having a predetermined pattern on the second electrode layer; (E) forming a memory element by selectively removing the first electrode layer, the ferroelectric layer, and the second electrode layer using the mask; and (F) removing the mask, where at least, the processes (D) and (E), or the processes (E) and (F) are continuously performed under a reduced pressure.

Claims

1. A method for manufacturing a device, comprising:

(A) forming a first electrode layer on a substrate;

(B) forming a ferroelectric layer on the first electrode layer;

(C) forming a second electrode layer on the ferroelectric layer;

(D) forming a mask having a predetermined pattern on the second electrode layer;

(E) forming a memory element by selectively removing the first electrode layer, the ferroelectric layer, and the second electrode layer using the mask; and

(F) removing the mask, wherein

at least, the processes (D) and (E), or the processes (E) and (F) are continuously performed under a reduced pressure.

2. The method according to claim 1, wherein the process (D) and the process (F) are performed at a normal temperature, and the process (E) is performed at a high temperature.

3. The method according to claim 1, wherein the process (D), the process (E), and the process (F) are continuously performed under a reduced pressure.

4. The method according to claim 1, further comprising:

(G) preheating the substrate at a stage previous to the process (E).

5. The method according to claim 4, wherein a chamber in which the process (E) is performed is different from a chamber in which the process (G) is performed, and the process (E) and the process (G) are continuously performed under a reduced pressure.

6. The method according to claim 1, wherein a gas remaining in the substrate is removed at a stage subsequent to the process (F) in a chamber different from the chamber in which the process (F) is performed.

7. The method according to claim 1, wherein the first electrode layer and the second electrode layer includes one, two, or more selected from the group consisting of platinum, iridium, ruthenium, rhodium, palladium, osmium, iridium oxide, ruthenium oxide, and strontium ruthenate, and wherein the ferroelectric layer is one selected from the group consisting of PZT (Pb(Zr, Ti)O₃), SBT (SrBi₂Ta₂O₉), BTO (Bi₄Ti₃O₁₂), BLT ((Bi, La)₄Ti₃O₁₂), and BTO (BaTiO₃).

8. An apparatus for manufacturing a device, comprising:

a transfer chamber including a transfer mechanism transferring a substrate;

a normal-temperature etching chamber coupled to the transfer chamber;

a high-temperature etching chamber coupled to the transfer chamber; and

one or more load lock chambers coupled to the transfer chamber, wherein the transfer mechanism continuously transfers the substrate between the normal-temperature etching chamber, the high-temperature etching chamber, and the load lock chamber under vacuum.

9. The apparatus according to claim 8, further comprising:

an ashing chamber; and

a pre-heat chamber, wherein either or both of the ashing chamber and the pre-heat chamber is provided at the transfer chamber, and the transfer mechanism continuously transfers the substrate under vacuum between the ashing chamber, the pre-heat chamber, the normal-temperature etching chamber, the high-temperature etching chamber, and the load lock chamber.