Test Device and Test Method for Semiconductor Device

• US 20090278562A1
• Filed: 05/07/2009
• Published: 11/12/2009
• Est. Priority Date: 05/07/2008
• Status: Abandoned Application

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Zaitsu, Hiroshi
• Application Number:
  US12/436,986
• Publication Number:
  US 20090278562A1
• Time in Patent Office: Days
• US Class Current: 324/762.10
• CPC Class Codes: G01R 31/31924 Voltage or current aspects, e.g. driver, receiver
• CPC Class Codes: G01R 31/31932 Comparators

Abstract

The objective of this invention is to provide a test device that can perform a variety of function tests with a relatively simple constitution. The test device is for testing semiconductor device 1, which contains input terminal IN, output terminal OUT and control terminal CTRL, and whose output terminal is in the high-impedance state corresponding to the control signal applied to control terminal CTRL. The test device comprises test signal supply circuit 20, comparator 30 that compares the output signal from the output terminal with a reference voltage, reference voltage setting part 40 that sets the reference voltage to the voltage on the high-level side or on the low-level side, and load voltage supply circuit 50 that applies the load voltage to the output signal when the control signal is input. Said load voltage supply circuit 50 applies a load voltage greater than the voltage on the high-level side when the reference voltage is set to the high-level side, and it applies a load voltage less than the voltage on the low-level side when the reference voltage is set to the low-level side.

Claims

1. A test device for testing a semiconductor device that contains an input terminal, an output terminal and a control terminal, and whose output terminal can assume a high-impedance state on the basis of a control signal applied to the control terminal, characterized in that the test device comprises

a supply circuit that supplies a test signal to said input terminal,

a comparator that compares the output signal output from said output terminal in response to said test signal with a reference voltage, and outputs a high-level or low-level expectation value signal,

a reference voltage setting part that sets said reference voltage to the high-level side voltage or low-level side voltage,

and a load voltage supply circuit that applies a load voltage to said output signal;

wherein said load voltage supply circuit operates such that when said reference voltage is set to the high-level side voltage, a load voltage above said high-level side voltage is applied to said output signal, and when said reference voltage is set to the low-level side voltage, a load voltage below said low-level side voltage is applied to said output signal.

2. The test device of claim 1 characterized in that when said control signal is applied, said reference voltage setting part sets the reference voltage to the low-level side with respect to a high-level test signal, and sets the reference voltage to the high-level side with respect to a low-level test signal.

3. The test device of claim 1 characterized in that said load voltage supply circuit contains a switch that is turned on or off in response to said control signal, so that when said control signal is applied, said switch is turned on, and the load voltage is applied to said output signal.

4. The test device of claim 1 characterized in that the load voltage supply circuit has the function of supplying the load current to the input terminal or output terminal of the semiconductor device.

5. The test device of claim 1 characterized in that the test device also contains a determination circuit that determines whether the expectation value signal output from the comparator and the test signal agree with values in a truth table.

6. A test method for testing a semiconductor device that contains an input terminal, an output terminal and a control terminal, and whose output terminal can assume a high-impedance state on the basis of a control signal applied to the control terminal, characterized in that the test method comprises the following steps:

a step in which a test signal is applied to said input terminal, and said control signal is applied to said control terminal;

a step in which the load voltage is applied to the output signal at said output terminal;

a step in which the output signal with said applied load voltage is compared with a reference voltage;

and a step in which it is determined whether the function is normal on the basis of the expectation value signal as the comparison result and the test signal;

wherein when said test signal is at the high level, said reference voltage is set to the low-level side voltage, and when said test signal is at the low level, said reference voltage is set to the high-level side voltage; and

wherein said load voltage is above the high-level side voltage when said reference voltage is at the high-level side voltage, and said load voltage is below said low-level side voltage when said reference voltage is at the low-level side voltage.

7. The test method of claim 6 characterized in that said method also comprises the following steps:

a step in which the test signal is applied to said input terminal;

a step in which the output signal at said output terminal and the reference voltage are compared;

and a step in which it is determined whether the function is normal on the basis of the expectation value signal as the comparison result and the test signal.

8. A test method for testing a semiconductor device that contains an input terminal, an output terminal and a control terminal, and whose output terminal can assume a high-impedance state on the basis of a control signal applied to the control terminal, characterized in that the test method comprises the following steps:

a first step in which the following operation is performed;

when the reference voltage of the comparator is at the first level, the test signal is applied to said input terminal and the output signal at said output terminal is compared with the first-level reference voltage, and while the test signal is applied to said input terminal, the control signal is applied to said control terminal, the first load voltage is applied to said output signal, the output signal with said applied first load voltage is compared with the first-level reference voltage, and a first function test is performed;

and a second step in which the following operation is performed;

when the reference voltage of the comparator is at the second level, the test signal is applied to said input terminal, the output signal at said output terminal is compared with the second-level reference voltage, and while the test signal is applied to said input terminal, the control signal is applied to said control terminal, the second load voltage is applied to said output signal, the output signal with said applied second load voltage is compared with the second-level reference voltage, and a second function test is performed;

wherein either said first step or said second step can be executed first;

and wherein when the first level of the reference voltage is greater than the second level, the first load voltage is greater than the first level of the reference voltage, and the second load voltage is less than the second level of the reference voltage.