Solar Cells and Methods for Manufacturing Same

• US 20090283141A1
• Filed: 04/12/2007
• Published: 11/19/2009
• Est. Priority Date: 04/12/2006
• Status: Abandoned Application

• Current Assignee: Renewable Energy Corporation ASA
• Original Assignee: Renewable Energy Corporation ASA
• Inventors: Sauar, Erik, Bentzen, Andreas
• Application Number:
  US12/226,133
• Publication Number:
  US 20090283141A1
• Time in Patent Office: Days
• US Class Current: 136/256
• CPC Class Codes: H01L 31/02167 for solar cells
• CPC Class Codes: H01L 31/022425 for solar cells
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells

Abstract

This invention relates to a method for contacting solar wafers containing one or more layers of temperature sensitive passivation layers by first creating local openings in the passivation layer(s) and then fill the openings with an electric conducting material. In this way, it becomes possible to avoid the relatively high temperatures needed in the conventional method for contacting solar wafers containing one or more passivation layer(s), and thus maintain the excellent passivation properties of newly developed temperature sensitive passivation layer(s) during and after the contacting.

Claims

1-19. -19. (canceled)

20. A method for contacting a metallic semiconductor wafer,

where the wafer has

at least one thin diffused layer of one type of conductivity (p- or n-type) on one side of the wafer, and the bulk wafer has the other type of conductivity (n- or p-type), and

at least one deposited surface passivation layer/film on at least one of the first (light receiving side) or second (back side) surface,

wherein

forming a contact site by creating at least one opening in the at least one passivation layer by locally removing the at least one passivation layer to expose the underlying surface of the semiconductor wafer, and then

establishing electric contact with the semiconductor wafer by filling the at least one opening in the at least one passivation layer with an electrically conducting material that is UV-light resistant and functional at temperatures up to at least about 150 to 250°

C. by employing one of the following techniques;

electroless plating or electroplating, or ink-jet printing or screen-printing of a paste containing the electricity conducting material followed by a gentle annealing up to 550°

C. or less, depending on the heat sensitivity of the passivation layer(s).

21. A method according to claim 20,

where the at least one contact site(s) is/are reinforced by forming a contact point on each of the at least one contact site(s) before formation of the at least one passivation layer(s), wherein the at least one contact point(s) is/are made by:

ink-jet printing a thin paste comprising silver particles on each of the at least one contact sites on the first surface of the semiconductor wafer,

ink-jet printing a thin paste comprising aluminium particles on each of the at least one contact sites on the second surface of the semiconductor wafer,

annealing the deposited paste(s) on the first and second surface of the wafer at temperatures up to 1000°

C. to form metallic contact points, and finally

etching away excess metal deposits on the contact points by immersion in an etching solution which is one or more of the following;

a mixture of H₂O₂ and H₂SO₄, a mixture of H₂O₂, NH₄OH, and H₂0, or a mixture of H₂O₂, HCl, and H₂O.

22. A method according to claim 21,

wherein the thin paste comprising silver particles and/or the thin paste comprising aluminium particles is/are screen-printed onto the first and/or second surface of the wafer, respectively.

23. A method according to claim 20,

wherein the surface passivation of at least one of the first or second surface of the semiconductor wafer is obtained by

cleaning the semiconductor wafer by immersion in a mixture of H₂SO₄ and H₂O₂, or a mixture of HCl, H₂O₂ and H₂O, or a mixture of NH₄OH, H₂O₂ and H₂O,

removing the oxide film on the wafer side(s) that is/are to be passivated by immersion in diluted HF,

introducing the wafer into a plasma enhanced chemical vapour deposition chamber (PECVD-chamber),

depositing a 1-150 nm thick amorphous silicon film by use of SiH₄ as sole precursor gas at about 250°

C.,

depositing a 10-200 nm thick silicon nitride film by use of a mixture of SiH₄ and NH₃ as precursor gases at about 250°

C., and finally

annealing the wafer with the deposited passivation at a temperature in the range from about 350 to about 550°

C.

24. A method according to claim 23,

wherein

the precursor gases also comprises from 0 to 50 mol % hydrogen gas.

25. A method according to claim 23,

wherein

the amorphous silicon film is about 10-100 nm thick,

the silicon nitride film is about 70-100 nm thick, and

the annealing is performed at a temperature of about 500°

C. for four minutes.

26. A method according to claim 25,

wherein the localised opening of the one or more passivation layer(s) is obtained:

by use of an etching agent that is either ink-jet printed or screen-printed onto the region(s) of the at least one passivation layer covering the contact site(s), or

by screen-printing a chemical resist covering the areas of the at least one passivation layer(s) that are to remain on the wafer, followed by immersion of the solar wafer in an etching agent to remove the unprotected passivation film(s).

27. A method according to claim 26,

wherein

the chemical etching agent comprises one or more of the following agents;

a solution comprising diluted or concentrated HF, or KOH, or NaOH, or a mixture comprising HF, HNO₃, and CH₃COOH.

28. A method according to claim 23,

wherein the localised opening of the one or more passivation layer(s) is obtained by local heating of the area of the passivation layer(s) covering the contact sites by exposure to a laser beam.

29. A method according to claim 20,

wherein the at least one electric contact(s) with the semiconductor wafer is obtained by filling the at least one opening in the at least one passivation layer(s) by an electricity conducting material comprising one or more of the following materials;

nickel, silver, copper, and/or tin, or any combination of these materials.

30. A method according to claim 20,

wherein the contacting of the second surface (backside) of the wafer is obtained by

depositing a layer of aluminium on top of the at least one passivation layer(s), and

pressing a heating member with a series of hot needle-like protrusions onto the deposited aluminium layer in order to locally heating the aluminium layer until it “

burns”

it way through the passivation layers and establishes electric contact between the aluminium layer and underlying wafer.

31. A method according to claim 30,

wherein

the local temperature of the aluminium layer in contact with the heating element is about 650°

C., and that

a cooling element is placed in contact with the first surface (light receiving surface) of the wafer during heating.

32. A method according to claim 20,

wherein the contacting of the second surface (backside) of the wafer is obtained by

depositing a layer of aluminium on top of the at least one passivation layer(s), and

locally heating the contact sites on the deposited aluminium layer in order to allow the aluminium phase to “

burns”

through the passivation layers and establishes electric contact between the aluminium layer and underlying wafer by use of electromagnetic radiation.

33. A method according to claim 32,

wherein

the local temperature of the aluminium layer in contact with the heating element is about 650°

C.,

a cooling element is placed in contact with the first surface (light receiving surface) of the wafer during heating, and that

the electromagnetic radiation is an infra-red radiation or a laser beam.

34. A method according to claim 20,

wherein the semiconductor wafer is one of monocrystalline or multicrystalline silicon.

35. A solar cell comprising

a silicon semiconductor wafer of one type of conductivity (p- or n-type) having a at least one thin diffused layer of the other type conductivity (n- or p-type), and

at least one deposited surface passivation layer/film on at least one of the first (light receiving side) or second (back side) surface,

at least one contact site point at the first and second surface establishing electric contact with the wafer, and

at least one electric contact on both sides of the wafer,

wherein

the at least one passivation layer(s) is formed by using at least one hydrogen containing precursor gas in a plasma enhanced chemical vapour deposition chamber (PECVD-chamber) followed by a gentle annealing such that at least a portion of the free bonds in the surface region of the silicon semiconductor wafer is satisfied by in-diffusion of hydrogen atoms.

36. A solar cell according to claim 35,

wherein the surface passivation of at least one of the first or second surface of the semiconductor wafer comprises

a 1-150 nm thick amorphous silicon film and a 10-200 nm thick silicon nitride film, and which is

subsequently annealed at a temperature in the range from about 350 to about 550°

C. in order to introduce hydrogen atoms into the surface region of the wafer underlying the deposited films.

37. A solar cell according to claim 36,

wherein

the amorphous silicon film has a thickness about 10-100 nm,

the silicon nitride film has a thickness about 70-100 nm, and in that

the subsequent annealing was performed at about 500°

C. for four minutes in order to introduce about 10 atom %, H in the surface region of the semiconductor wafer underlying the deposited films.

38. A solar cell according to claim 35,

wherein the semiconductor wafer is one of monocrystalline or multicrystalline solar grade silicon.