ORGANIC LIGHT EMITTING DISPLAY AND METHOD FOR MAKING THE SAME

• US 20090283774A1
• Filed: 02/18/2009
• Published: 11/19/2009
• Est. Priority Date: 05/14/2008
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kwak, Won-Kyu, Shin, Hey-Jin
• Granted Patent: US 7,888,683 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2330/04 Display protection
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 71/70 Testing, e.g. accelerated lifetime tests

Abstract

An organic light emitting display and a method for making the same includes protection circuitry to avoid damage from static electricity. The display and method allow performing a lighting test during display manufacturing. The organic light emitting display includes a substrate, a display region on the transparent substrate with a matrix of pixels, and a signal transfer unit on the transparent substrate for transferring lighting test signals to the pixels. The signal transfer unit includes transistors for transferring the lighting test signals and a resistor coupled to drains and gates of the transistors for protecting the transistors against damage from static electricity.

Claims

1. An organic light emitting display comprising:

a substrate;

a display region on the substrate, the display region comprising a plurality of pixels; and

a signal transfer unit on the substrate for transferring lighting test signals to the plurality of pixels,

wherein the signal transfer unit comprises a plurality of transistors for transferring the lighting test signals, and a resistor coupled to drains and gates of the plurality of transistors for protecting the plurality of transistors.

2. The organic light emitting display as claimed in claim 1, wherein the resistor comprises an intrinsic semiconductor.

3. The organic light emitting display as claimed in claim 1, wherein the plurality of transistors of the signal transfer unit comprises:

channel regions on the substrate, the channel regions comprising a semiconductor layer;

a first insulating film on the channel regions and the substrate;

gate metals on the first insulating film, the gate metals comprising a first metal layer, wherein the gate metals are coupled to an end of the resistor;

a second insulating film on the gate metals and the first insulating film; and

source-drain metals on the second insulating film, the source-drain metals comprising a second metal layer, wherein the source-drain metals are coupled to the channel regions and coupled to another end of the resistor.

4. The organic light emitting display as claimed in claim 3, wherein the resistor comprises the same semiconductor layer as the channel regions of the plurality of transistors.

5. The organic light emitting display as claimed in claim 1, wherein at least one transistor of the plurality of transistors is not configured for transferring the lighting test signals.

6. The organic light emitting display as claimed in claim 3, wherein a data driver is coupled to a region on the substrate where the signal transfer unit is positioned.

7. The organic light emitting display as claimed in claim 1, wherein gate metals are on the resistor.

8. A method for making an organic light emitting display, the method comprising:

patterning a semiconductor layer on a substrate to form channel regions;

forming a first insulating film on the substrate and on the channel regions;

patterning a first metal layer on the first insulating film to form gate metals;

forming a second insulating film on the first insulating film and on the gate metals; and

patterning a second metal layer on the second insulating film to form source-drain metals,

wherein an end of the source-drain metals is coupled to an end of the gate metals.

9. The method as claimed in claim 8, further comprising etching an area where the source-drain metals are coupled to the gate metals.

10. The method as claimed in claim 9, wherein the etching utilizes galvanic effect.

11. The method as claimed in claim 8, wherein the coupling between the end of the source-drain metals and an extended end of the gate metals is through a contact hole in the second insulating film.

12. The method as claimed in claim 9, further comprising performing an ion doping process after the patterning the first metal layer to form the gate metals.

13. A method for making an organic light emitting display, the method comprising:

patterning semiconductor layers on a substrate to form a first channel region and a second channel region;

forming a first insulating film on the substrate and on the first and second channel regions;

patterning a first metal layer on the first insulating film to form a first gate metal formed on the first channel region and a second gate metal formed on the second channel region, one end of the first gate metal being coupled to that of the second channel region;

forming a second insulating film on the first insulating film and on the first and second gate metals; and

patterning a second metal layer on the second insulating film to form source-drain metals, one end of the source-drain metals being coupled to that of the second channel region.

14. The method as claimed in claim 13, wherein the second gate metal covers substantially an entire area of the second channel region.

15. The method as claimed in claim 13, further comprising performing an ion doping process after the patterning the first metal layer.

16. The method as claimed in claim 13, wherein the second channel region comprises an intrinsic semiconductor.