BACKSIDE CONTROLLED MEMS CAPACITIVE SENSOR AND INTERFACE AND METHOD

• US 20090283846A1
• Filed: 05/15/2008
• Published: 11/19/2009
• Est. Priority Date: 05/15/2008
• Status: Active Grant

• Current Assignee: Custom Sensors & Technologies Incorporated (Schneider Electric SE)
• Original Assignee: Custom Sensors & Technologies Incorporated (Schneider Electric SE)
• Inventors: Seesink, Peter, Abed, Omar
• Granted Patent: US 8,217,475 B2
• Time in Patent Office: Days
• US Class Current: 257/419
• CPC Class Codes: G01L 9/0073 using a semiconductive diaphragm
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Abstract

Described herein is the sense element assembly for a capacitive pressure sensor and method for creating same that has increased sensitivity despite the parasitic capacitance that is created. The capacitive sensor element assembly, comprises a first semiconductive layer, and a first conductive layer, a first dielectric layer into which a cavity has been formed, the dielectric layer lying between the first semiconductive layer and the first conductive layer, wherein an electrical connection is made to the second conductive layer. A preferred method for fabricating a capacitive sensor assembly of the present invention comprises the steps of forming a dielectric layer on top of a conductive handle wafer; creating at least one cavity in the dielectric layer, bonding a thin semiconductive layer to the dielectric layer and connecting an operational amplifier to the input of the capacitive sensor assembly to overcome the parasitic capacitance formed during fabrication.

Claims

1. A capacitive sensor element assembly, comprising:

a first semiconductive layer,

a first conductive layer, and

a first dielectric layer into which a cavity has been formed, the first dielectric layer lying between the first semiconductive layer and the first conductive layer,

wherein an electrical connection is made to the second conductive layer.

2. The capacitive sensor element assembly of claim 1, further comprising an operational amplifier attached to the electrical input of the assembly.

3. The capacitive sensor element assembly of claim 1 further comprising a second dielectric layer on the bottom of the cavity in the first dielectric layer.

4. The capacitive sensor element assembly of claim 1, wherein the dielectric layer is a thin layer of oxide.

5. The capacitive sensor element assembly of claim 1 wherein the cavity is formed by etching.

6. The capacitive sensor element assembly of claim 1 wherein the cavity is formed by masking.

7. The capacitive sensor element assembly of claim 1 wherein the first semiconductive layer is thinner than the first conductive layer and the first conductive layer is thick enough to support the first semiconductive layer and the dielectric layer.

8. The capacitive sensor element assembly of claim 1 further comprising an operational amplifier attached to the first semiconductive layer and the first conductive layer.

9. A method for fabricating a capacitive sensor assembly, comprising the steps of:

forming a dielectric layer on top of a conductive handle wafer;

creating at least one cavity in the dielectric layer; and

bonding a thin semiconductive layer to the dielectric layer.

10. The method of claim 9, further comprising the steps of connecting an operational amplifier to the input of the capacitive sensor assembly.

11. The method of claim 9, further comprising the steps of forming an additional thin dielectric layer at the bottom of the cavity in the dielectric layer.

12. A method of fabricating a capacitive sensor assembly, comprising the steps of:

forming a dielectric layer on top of a conductive silicon wafer;

creating at least one cavity in the dielectric layer;

bonding the top thin silicon layer of an SOI wafer to the dielectric layer; and

removing the thick silicon and oxide layers of the SOI wafer.

13. The method of fabricating a capacitive sensor assembly of claim 12 further comprising the step of attaching an operational amplifier to the assembly.

14. The method of claim 12, further comprising the steps of forming an additional thin dielectric layer at the bottom of the cavity in the dielectric layer.