Semiconductor Substrate and a Method of Manufacturing the Same

• US 20090283866A1
• Filed: 05/19/2008
• Published: 11/19/2009
• Est. Priority Date: 05/19/2008
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Schulze, Hans-Joachim, Pfirsch, Frank, Timme, Hans-Joerg
• Granted Patent: US 8,779,462 B2
• Time in Patent Office: Days
• US Class Current: 257/607
• CPC Class Codes: H01L 21/22 Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/2652 Through-implantation
• CPC Class Codes: H01L 21/3225 Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering H01L21/3226 takes precedence
• CPC Class Codes: H01L 29/32 the imperfections being within the semiconductor body
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H03H 9/02047 Treatment of substrates
• CPC Class Codes: H03H 9/175 Acoustic mirrors

Abstract

The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material includes acceptor or donor impurity atoms or crystal defects, whose energy levels are located at least 120 meV from the conduction band edge, as well as from the valence band edge in the bandgap; and wherein the concentration of the impurity atoms or crystal defects is larger than 1×10¹² cm⁻³.

Claims

1. A semiconductor substrate comprising a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material comprises acceptor or donor impurity atoms or crystal defects, whose energy levels are located at least 120 meV from the conduction band edge, as well as from the valence band edge in the bandgap;

and wherein concentration of the impurity atoms or crystal defects is larger than 1×

10¹² cm<sup>−

3</sup>.

2. The semiconductor substrate according to claim 1, wherein the impurity atoms are acceptor impurities, which compensate electrons from oxygen doping-induced donors.

3. The semiconductor substrate according to claim 1, wherein the impurity atoms are neither oxygen atoms, nor carbon atoms.

4. The semiconductor substrate according to claim 1, wherein concentration of the impurity atoms or crystal defects is larger than 1×

10¹³ cm<sup>−

3</sup>.

5. The semiconductor substrate according to claim 1, wherein the concentration of the impurity atoms or crystal defects is larger than 1×

10¹⁴ cm<sup>−

3</sup>.

6. The semiconductor substrate according to claim 1, wherein the impurity atoms comprise gold (Au), indium (In), sulfur (S), platinum (Pt), or selenium (Se) atoms.

7. The semiconductor substrate according to claim 1, wherein at least 50% of the substrate volume comprises semiconductor material with the impurity atoms or crystal defects.

8. The semiconductor substrate according to claim 1, wherein the maximum concentration of the impurity atoms or crystal defects is smaller or equal to 1×

10¹⁷ cm<sup>−

3</sup>.

9. The semiconductor substrate according to claim 1, wherein the semiconductor material is manufactured using a Czochralski or Magnetic Czochralski growing technique.

10. The semiconductor substrate according to claim 1, wherein a concentration of interstitial oxygen in the semiconductor substrate is between 1×

10¹⁷ cm<sup>−

3</sup> and 1×

10¹⁸ cm ; and

wherein concentration of impurity atoms is between 1×

10¹³ cm<sup>−

3</sup> and 1×

10¹⁵ cm³.

11. The semiconductor substrate according to claim 1, comprising a base doping, wherein the base doping is dimensioned so that specific resistivity of the semiconductor material is higher than 1×

10² Ohm cm.

12. The semiconductor substrate according to claim 11, wherein the semiconductor substrate comprises a semiconductor material with a p-type base doping.

13. The semiconductor substrate according to claim 1, wherein the semiconductor material has a concentration of interstitial oxygen between 1×

10¹⁷ cm<sup>−

3</sup> and 1×

10¹⁸ cm<sup>−

3</sup>, and a doping with impurity atoms comprising acceptor and donor impurity levels.

14. The semiconductor substrate according to claim 1, wherein the semiconductor substrate comprises a semiconductor material with a p-type doping in a first concentration and donor impurity atoms with a second concentration smaller than the first concentration.

15. The semiconductor substrate according to claim 1, wherein the semiconductor substrate comprises a semiconductor material with an n-type doping in a first concentration and acceptor impurity atoms with a second concentration higher than the first concentration.

16. An electronic device on the semiconductor substrate according to claim 1, wherein the semiconductor substrate includes an electronic device zone and wherein the semiconductor substrate is high-ohmic.

17. The electronic device according to claim 16, wherein the electronic device comprises a high frequency device.

18. The high frequency device according to claim 17, wherein the high frequency device comprises a bulk acoustic wave resonator.

19. The electronic device according to claim 16, wherein the semiconductor substrate comprises a semiconductor material with a specific resistivity higher than 100 Ohm cm.

20. An electronic device, wherein a substrate according to claim 7 forms a drift region or a base region of the electronic device.

21. A method for manufacturing a semiconductor substrate comprising a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a band gap, the method comprising:

manufacturing the semiconductor substrate so that the semiconductor material comprises acceptor or/and donor impurity atoms or crystal defects, whose energy levels are located at least 120 meV from the conduction band edge as well as from the valence band edge in the bandgap; and

wherein the concentration of the impurity atoms or crystal defects is greater than 1×

10¹² cm<sup>−

3</sup>.

22. The method according to claim 21, wherein the manufacturing comprises introducing impurity atoms into the semiconductor material by means of diffusion processes or ion-implantation with subsequent high-temperature diffusion steps.

23. The method according to claim 21, wherein the manufacturing is performed so that the concentration of the impurity atoms or crystal defects is greater than 1×

10¹³ cm<sup>−

3</sup>.

24. The method according to claim 21, wherein the manufacturing is performed using gold, indium, sulfur, platinum, or selenium.

25. The method according to claim 21, further comprising base doping the semiconductor material, wherein the base doping is dimensioned so that a specific resistivity of the semiconductor material is greater than 1×

10² Ohm cm.

26. The method according to claim 21, wherein the manufacturing is performed so that the concentration of the impurity atoms or crystal defects is between 1×

10¹³ cm<sup>−

3</sup> and 1×

10¹⁵ cm<sup>−

3</sup>, if the semiconductor substrate comprises a concentration of interstitial oxygen between 1×

10¹⁷ cm<sup>−

3</sup> to 1×

10¹⁸ cm<sup>−

3</sup>.

27. The method according to claim 21, further comprising determining a concentration of interstitial oxygen in the semiconductor substrate;

and

determining a concentration for doping of the semiconductor substrate with acceptor or donor impurity atoms based on the determined concentration of interstitial oxygen.

28. The method according to claim 21, further comprising determining a concentration of interstitial oxygen in a test semiconductor substrate;

and

wherein the manufacturing of the semiconductor substrate is performed with a concentration depending on the determined interstitial oxygen concentration in the test semiconductor substrate.

29. The method according to claim 21, wherein manufacturing the semiconductor substrate further comprises a p-type base doping the semiconductor substrate, which comprises a concentration of interstitial oxygen between 1×

10¹⁷ cm<sup>−

3</sup> and 1×

10¹⁸ cm<sup>−

3</sup> so that the semiconductor substrate comprises a specific resistance of the semiconductor material higher than 1×

10² Ohm cm and a doping with impurity atoms comprising acceptor and donor impurity levels within the band gap of the semiconductor material.

30. The method according to claim 21, wherein the semiconductor substrate has crystal defects manufactured by irradiating the semiconductor substrate with light high-energetic particles or gamma radiation.

31. A method of manufacturing a semiconductor substrate, the method comprising:

providing a semiconductor material melt;

doping the semiconductor material melt with acceptor or donor impurity atoms, wherein the concentration of the impurity atoms is greater than 1×

10¹² cm<sup>−

3</sup>;

pulling a single crystal from the semiconductor material melt with the impurity atoms in a crucible by a Czochralski method, wherein a semiconductor material ingot is formed; and

sawing the semiconductor material ingot, wherein a wafer as the semiconductor substrate is formed.