DISPLAY DEVICE

• US 20090284451A1
• Filed: 05/12/2009
• Published: 11/19/2009
• Est. Priority Date: 05/13/2008
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Yamamoto, Tetsuro, Uchino, Katsuhide
• Granted Patent: US 8,390,540 B2
• Time in Patent Office: Days
• US Class Current: 345/77
• CPC Class Codes: C22C 38/22 with molybdenum or tungsten
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0465 Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: H01L 23/53214 the principal metal being aluminium
• CPC Class Codes: H05B 45/00 Circuit arrangements for operating light-emitting diodes [LED]
• CPC Class Codes: H10K 50/805 Electrodes
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

A display device includes: a pixel array having a plurality of pixels arranged in a matrix form, each of the pixels including a sampling transistor configured to sample a data potential from a video signal line which is insulated from and intersects a control line in response to the change in potential of the control line, and a light-emitting element configured to emit light at the brightness commensurate with the magnitude of the post-sampling data potential.

Claims

1. A display device comprising:

a pixel array having a plurality of pixels arranged in a matrix form, each of the pixels including

a sampling transistor configured to sample a data potential from a video signal line which is insulated from and intersects a control line in response to the change in potential of the control line, and

a light-emitting element configured to emit light at the brightness commensurate with the magnitude of the post-sampling data potential, wherein

one of the video signal line and control line includes a layer including a high-fusion-point metal wiring and an overlying wiring layer connected to the layer including the high-fusion-point metal wiring via a contact hole, the layer including the high-fusion-point metal wiring being made of the same material as the gate of the sampling transistor,

the other of the video signal line and control line is a single layer wiring provided at the same hierarchical level and made of the same material as the overlying wiring layer which intersects the one of the video signal line and control line at a portion of the layer including the high-fusion-point metal wiring layer, and

in the one of the video signal line and control line, the plurality of contact holes are provided for each wiring connection section configured to connect an end portion of the layer including the high-fusion-point metal wiring and an end portion of the overlying wiring layer.

2. The display device of claim 1, wherein

the layer including the high-fusion-point metal wiring contains a metallic material having a higher wiring resistance and higher fusion point than the overlying wiring layer.

3. The display device of claim 1, wherein

when the number of the contact holes is increased for each of the wiring connection sections, only a given number of the contact holes are provided for each of the wiring connection sections if a signal waveform of the video signal line no longer shows any change of response with the given number of the contact holes or more provided.

4. The display device of claim 1, wherein

a source voltage supply line configured to pass a drive current through the light-emitting element is disposed in the pixel in parallel with the control line,

the intersection between the source voltage supply line and video signal line is formed with other layer including the high-fusion-point metal wiring provided at the same hierarchical level and made of the same material as the layer including the high-fusion-point metal wiring, and

as many contact holes as contact holes in the wiring connection section are formed in other wiring connection section between the other layer including the high-fusion-point metal wiring and the overlying wiring layer.

5. The display device of claim 4, wherein

the layer including the high-fusion-point metal wiring and the other layer including the high-fusion-point metal wiring are connected so as to form a single pattern.

6. The display device of claim 5, wherein

the overlying wiring layer is disposed so as to form a length with a predetermined spacing provided with the control line and source voltage supply line respectively to prevent short circuit, and

the contact holes shared by the wiring connection section and other wiring connection section are arranged along the length of the overlying wiring layer.

7. The display device of claim 1, wherein

the number of the contact holes of the wiring connection section is larger than the maximum number of contact holes provided for each of the other connection sections in the pixel, including the connection section configured to connect the control line to the control node of the sampling transistor.

8. A display device comprising:

a pixel array having a plurality of pixels arranged in a matrix form, wherein

first and second wirings are provided at least one each for each of the plurality of pixels, the first wiring being disposed in one direction, and the second wiring being disposed in a direction orthogonal to the first wiring,

one of the first and second wirings is formed with a high-fusion-point metal wiring layer, contact hole and overlying wiring layer, the contact hole being provided in an insulating layer on the high-fusion-point metal wiring layer, and the overlying wiring layer being connected to the high-fusion-point metal wiring layer via the contact hole and provided on the insulating layer,

the other of the first and second wirings is a single layer wiring provided at the same hierarchical level and made of the same material as the overlying wiring layer, and

the plurality of contact holes are provided for each wiring connection section configured to connect an end portion of the layer including the high-fusion-point metal wiring and an end portion of the overlying wiring layer.

9. The display device of claim 8, wherein

the layer including the high-fusion-point metal wiring contains a metallic material having a higher wiring resistance and higher fusion point than the overlying wiring layer.