SYSTEMS AND METHODS FOR DETECTING DEFECTS ON A WAFER AND GENERATING INSPECTION RESULTS FOR THE WAFER

• US 20090287440A1
• Filed: 05/14/2008
• Published: 11/19/2009
• Est. Priority Date: 05/14/2008
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation (KLA Corporation)
• Original Assignee: KLA-Tencor Corporation (KLA Corporation)
• Inventors: Kulkarni, Ashok, Bhattacharyya, Santosh
• Granted Patent: US 7,756,658 B2
• Time in Patent Office: Days
• US Class Current: 702/82
• CPC Class Codes: G05B 19/41875 characterised by quality surveillance of production
• CPC Class Codes: G05B 2219/37224 Inspect wafer
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

Systems and methods for detecting defects on a wafer and generating inspection results for the wafer are provided. One method includes detecting defects on a wafer by comparing output generated by scanning of the wafer performed by an inspection system to one or more defect detection thresholds. The method also includes sampling outliers in the output by selecting the output having the highest values from bins defined based on one or more predetermined criteria. In addition, the method includes selecting a portion of the sampled outliers based on wafer-level analysis of the sampled outliers. The method further includes generating inspection results for the wafer by combining information about the selected portion of the sampled outliers with information about the defects detected using the one or more defect detection thresholds.

Claims

1. A computer-implemented method for detecting defects on a wafer and generating inspection results for the wafer, comprising:

detecting defects on a wafer by comparing output generated by scanning of the wafer performed by an inspection system to one or more defect detection thresholds;

sampling outliers in the output by selecting the output having the highest values from bins defined based on one or more predetermined criteria;

selecting a portion of the sampled outliers based on wafer-level analysis of the sampled outliers; and

generating inspection results for the wafer by combining information about the selected portion of the sampled outliers with information about the defects detected using the one or more defect detection thresholds.

2. The method of claim 1, wherein the one or more defect detection thresholds do not comprise a hot threshold.

3. The method of claim 1, wherein said sampling is performed without applying a defect detection threshold to the output.

4. The method of claim 1, wherein a substantial portion of the sampled outliers have values below the one or more defect detection thresholds.

5. The method of claim 1, wherein said sampling is performed for only the output that does not correspond to the defects detected using the one or more defect detection thresholds.

6. The method of claim 1, wherein the one or more predetermined criteria comprise gray level, local texture, difference gray level between die, region type, design context or some combination thereof.

7. The method of claim 1, wherein a number of the outliers that is sampled is limited only by memory capacity of a computer subsystem that performs said sampling

8. The method of claim 1, wherein said sampling comprises sampling a number of the outliers from each of the bins.

9. The method of claim 1, wherein the sampled outliers and the defects comprise random defects and systematic defects.

10. The method of claim 1, wherein the selected portion of the sampled outliers does not comprise all of the sampled outliers.

11. The method of claim 1, wherein the wafer-level analysis comprises statistical analysis of the sampled outliers and identifying patterns in results of the statistical analysis.

12. The method of claim 1, wherein the wafer-level analysis comprises analyzing the sampled outliers for wafer-level signatures.

13. The method of claim 1, wherein the wafer-level analysis comprises creating a wafer map from the sampled outliers, and wherein said selecting comprises analyzing the wafer map to select the portion of the sampled outliers.

14. The method of claim 1, wherein the wafer-level analysis comprises creating a stacked die map from the sampled outliers and analyzing the stacked die map to identify a signature in the stacked die map, and wherein said selecting comprises selecting the portion of the sampled outliers based on the signature in the stacked die map.

15. The method of claim 1, wherein the wafer-level analysis comprises overlaying design context information on a map of the sampled outliers and identifying one or more systematic defect mechanisms based on the design context information overlaid on the map, and wherein said selecting comprises selecting at least some of the sampled outliers corresponding to the one or more systematic defect mechanisms.

16. The method of claim 1, wherein the wafer-level analysis comprises identifying one or more signatures present in the sampled outliers, and wherein said selecting comprises comparing the defects detected using the one or more defect detection thresholds to the one or more signatures and selecting at least some of the sampled outliers such that the inspection results include at least some of the sampled outliers or defects corresponding to each of the one or more signatures.

17. The method of claim 1, wherein the wafer-level analysis comprises identifying an area on the wafer in which a number of the sampled outliers located in the area is higher than other areas on the wafer, and wherein said selecting comprises selecting at least some of the sampled outliers located in the area.

18. The method of claim 1, wherein said selecting comprises selecting the portion of the sampled outliers conditionally based on results of the wafer-level analysis of other sampled outliers.

19. The method of claim 1, wherein said detecting and said sampling are performed by computer nodes, and wherein said selecting and said generating are performed by a host.

20. A computer-readable medium, comprising program instructions executable on a computer system for performing a computer-implemented method for detecting defects on a wafer and generating inspection results for the wafer, wherein the computer-implemented method comprises:

detecting defects on a wafer by comparing output generated by scanning of the wafer performed by an inspection system to one or more defect detection thresholds;

sampling outliers in the output by selecting the output having the highest values from bins defined based on one or more predetermined criteria;

selecting a portion of the sampled outliers based on wafer-level analysis of the sampled outliers; and

generating inspection results for the wafer by combining information about the selected portion of the sampled outliers with information about the defects detected using the one or more defect detection thresholds.

21. A system configured to detect defects on a wafer and generate inspection results for the wafer, comprising:

an inspection subsystem configured to generate output by scanning a wafer; and

a computer subsystem configured to detect defects on the wafer by comparing the output to one or more defect detection thresholds, sample outliers in the output by selecting the output having the highest values from bins defined based on one or more predetermined criteria, select a portion of the sampled outliers based on wafer-level analysis of the sampled outliers, and generate inspection results for the wafer by combining information about the selected portion of the sampled outliers with information about the defects detected using the one or more defect detection thresholds.