MULTI-CHIP PACKAGE

• US 20090293604A1
• Filed: 05/29/2008
• Published: 12/03/2009
• Est. Priority Date: 05/29/2008
• Status: Active Grant

• Current Assignee: Hong Kong Applied Science And Technology Research Institute Co., Ltd.
• Original Assignee: Hong Kong Applied Science And Technology Research Institute Co., Ltd.
• Inventors: Sham, Man Lung, Leung, Lap Wai, Chung, Chang Hwa, Gao, Ziyang, Leung, Chi Kuen Vincent, Olleres, Lourdito M.
• Granted Patent: US 7,832,278 B2
• Time in Patent Office: Days
• US Class Current: 73/146.5
• CPC Class Codes: B60C 23/0408 transmitting the signals by non-mechanical means from the wheel or tyre to a vehicle body mounted receiver
• CPC Class Codes: G01L 19/141 Monolithic housings, e.g. molded or one-piece housings
• CPC Class Codes: G01L 19/148 Details about the circuit board integration, e.g. integrated with the diaphragm surface or encapsulation
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 25/165 Containers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Subject matter disclosed herein may relate to packaging for multi-chip semiconductor devices as may be used, for example, in tire pressure monitoring systems.

Claims

1. A semiconductor device, comprising:

a leadframe comprising a first side and a second side, wherein the second side comprises a first landing pad for a surface mount component;

a first integrated circuit die bonded to the first side of the leadframe; and

a package to encapsulate at least a portion of the first integrated circuit and at least a portion of the leadframe, wherein at least a portion of the first landing pad is not encapsulated by the package.

2. The semiconductor device of claim 1, further comprising a first surface mount component bonded to the first landing pad.

3. The semiconductor device of claim 2, further comprising a polymer layer formed substantially between the first surface mount component and the leadframe.

4. The semiconductor device of claim 2, wherein the package comprises a well structure surrounding the first landing pad.

5. The semiconductor device of claim 4, further comprising a material to substantially fill the well structure, the material to encapsulate, at least in part, the first surface mount component.

6. The semiconductor device of claim 5, wherein the material to substantially fill the well structure comprises a polymer.

7. The semiconductor device of claim 2, wherein the first surface mount component comprises a pressure sensor.

8. The semiconductor device of claim 7, wherein the first integrated circuit die comprises a processor.

9. The semiconductor device of claim 8, wherein the second side of the leadframe further comprises a second landing pad for a surface mount component.

10. The semiconductor device of claim 9, further comprising:

a second integrated circuit die bonded to the first side of the leadframe; and

a second surface mount component bonded to the second landing pad, the package to encapsulate at least a portion of the second integrated circuit and the package to not encapsulate at least a portion of the second surface mount component.

11. The semiconductor device of claim 10, wherein the second integrated circuit die comprises a radio frequency transmitter and wherein the second surface mount component comprises an oscillator.

12. A method, comprising:

forming a first landing pad on a first side of a leadframe;

bonding a first integrated circuit die to a second side of the leadframe; and

encapsulating with a first material at least a portion of the first integrated circuit die and at least a portion of the leadframe leaving the first landing pad substantially not encapsulated.

13. The method of claim 12, further comprising wire-bonding the first integrated circuit die to the leadframe.

14. The method of claim 12, wherein said encapsulating comprises a transfer molding technique.

15. The method of claim 14, wherein said encapsulating comprises forming a well structure surrounding the first landing pad.

16. The method of claim 14, further comprising applying a solder paste to at least a portion of the first landing pad.

17. The method of claim 16, further comprising:

placing a first surface mount component on the first landing pad; and

reflowing the solder paste to establish one or more electrical connections between the first surface mount component and the leadframe.

18. The method of claim 17, further comprising forming an epoxy layer between the first surface mount component and the leadframe.

19. A semiconductor device, comprising:

means for providing electrical connections between a landing pad for a surface mount component and an integrated circuit die, said means for providing electrical connections comprising a first side and a second side;

a first integrated circuit die bonded to the first side of the means for providing electrical connections; and

means for encapsulating at least a portion of the first integrated circuit die and at least a portion of the means for providing electrical connections, wherein at least a portion of the second side of the means for providing electrical connections is not encapsulated.

20. The semiconductor device of claim 19, further comprising a first surface mount component bonded to the second side of the means for providing electrical connections.

21. The semiconductor device of claim 20, further comprising means for reinforcing the bond between the first surface mount component and the means for providing electrical connections.

22. The semiconductor device of claim 20, wherein said means for encapsulating comprises a well structure surrounding at least a portion of the second side of the means for providing electrical connections.

23. The semiconductor device of claim 22, further comprising means for substantially filling the well structure, said means for substantially filling the well structure to encapsulate, at least in part, the first surface mount component

24. The semiconductor device of claim 20, wherein the first surface mount component comprises a pressure sensor.

25. The semiconductor device of claim 24, wherein the first integrated circuit die comprises a processor.

26. The semiconductor device of claim 25, further comprising:

a second integrated circuit die bonded to the first side of the means for providing electrical connections; and

a second surface mount component bonded to the second side of the means for providing electrical connections, said means for encapsulating to encapsulate at least a portion of the second integrated circuit die and to not encapsulate at least a portion of the second surface mount component.

27. The semiconductor device of claim 26, wherein the second integrated circuit die comprises a radio frequency transmitter and wherein the second surface mount component comprises an oscillator.

28. The semiconductor device of claim 26, wherein the second integrated circuit die comprises a radio frequency transmitter bonded to the first side of the means for providing electrical connections, and wherein the processor is also bonded to the first side of the means for providing electrical connections.

29. The semiconductor device of claim 19, further comprising a radio frequency transmitter, wherein the first integrated circuit die comprises a processor, and wherein the radio frequency transmitter is stacked onto the processor.

30. (canceled)

31. (canceled)

32. (canceled)