RF Power Amplifiers with Linearization

• US 20090295483A1
• Filed: 05/27/2009
• Published: 12/03/2009
• Est. Priority Date: 05/27/2008
• Status: Active Grant

• Current Assignee: Gula Consulting Limited Liability Company (Intellectual Ventures LLC)
• Original Assignee: Rayspan Corporation
• Inventors: Achour, Maha, Lee, Woo Yong, Gummalla, Ajay, Dupuy, Alexandre, Alidio, Raul
• Granted Patent: US 7,839,216 B2
• Time in Patent Office: Days
• US Class Current: 330/277
• CPC Class Codes: H03F 1/0266 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/0272 by using a signal derived from the output signal
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 1/3223 using feed-forward H03F1/3211 takes precedence
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 2200/102 A non-specified detector of a signal envelope being used in an amplifying circuit
• CPC Class Codes: H03F 2200/105 A non-specified detector of the power of a signal being used in an amplifying circuit
• CPC Class Codes: H03F 2200/111 the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
• CPC Class Codes: H03F 2200/18 the bias of the gate of a FET being controlled by a control signal
• CPC Class Codes: H03F 2200/222 A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
• CPC Class Codes: H03F 2200/255 Amplifier input adaptation especially for transmission line coupling purposes, e.g. impedance adaptation
• CPC Class Codes: H03F 2200/27 A biasing circuit node being switched in an amplifier circuit
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/423 Amplifier output adaptation especially for transmission line coupling purposes, e.g. impedance adaptation
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/99 A diode as rectifier being used as a detecting circuit in an amplifying circuit
• CPC Class Codes: H03F 2203/21106 An input signal being distributed in parallel over the inputs of a plurality of power amplifiers
• CPC Class Codes: H03F 2203/21139 An impedance adaptation circuit being added at the output of a power amplifier stage
• CPC Class Codes: H03F 2203/21142 Output signals of a plurality of power amplifiers are parallel combined to a common output
• CPC Class Codes: H03F 2203/21163 : An output signal dependant signal being measured by power measuring, e.g. by an inductive coupler, at the output of a power amplifier
• CPC Class Codes: H03F 2203/21166 : An output signal dependant signal being measured by voltage measuring at the output of a power amplifier
• CPC Class Codes: H03F 2203/21178 : Power transistors are made by coupling a plurality of single transistors in parallel
• CPC Class Codes: H03F 2203/7206 : the gated amplifier being switched on or off by a switch in the bias circuit of the amplifier controlling a bias voltage in the amplifier
• CPC Class Codes: H03F 2203/7236 : the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers by (a ) switch(es)
• CPC Class Codes: H03F 3/195 : in integrated circuits
• CPC Class Codes: H03F 3/211 : using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 : with semiconductor devices only
• CPC Class Codes: H03F 3/604 : using FET's
• CPC Class Codes: H03F 3/605 : Distributed amplifiers
• CPC Class Codes: H03F 3/68 : Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H03F 3/72 : Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H03G 1/0088 : using discontinuously variable devices, e.g. switch-operated

Abstract

Designs and techniques associated with power amplifiers for amplifying RF signals to provide variable power amplification and improved linearity in various RF amplification circuits, including power amplifiers operated under the power back-off conditions.

Claims

1. A power amplifier device, comprising:

an input port that receives an RF signal to be amplified in power;

an output port that outputs the RF signal that is amplified in power;

a plurality of cells electrically coupled to amplify the received RF signal, each of the cells having a first end coupled to the input port and a second end coupled to the output port and comprising one or more banks of transistors;

a bias circuit that provides a bias signal to turn on at least one bank of transistors in the plurality of cells and maintains a bias at the at least one bank during amplification of the RF signal;

an RF signal detector circuit that detects the RF signal to produce a detected voltage; and

a bias control circuit that receives the detected voltage, produces control signals based on the detected voltage, and supplies, respectively, the control signals to the banks of transistors other than the at least one bank of transistors that is biased on, to control an output current to increase with an increase in the control signals,

wherein the cells, the bias circuit, the RF signal detector circuit and the bias control circuit are configured to increase an output power associated with the output current to increase a linear region and efficiency at a power back-off condition.

2. The power amplifier device as in claim 1, wherein the RF signal detector circuit is coupled to the input port to detect the RF signal associated with an input power.

3. The power amplifier device as in claim 1, wherein the RF signal detector circuit is coupled to the output port to detect the RF signal associated with the output power.

4. The power amplifier device as in claim 1, wherein

the transistors are bipolar junction transistors;

the bias circuit provides the bias signal that is a bias base current for the at least one bank of transistors; and

the bias control circuit provides the control signals that are control base currents determined based on the detected voltage respectively for the banks of transistors other than the at least one bank of transistors.

5. The power amplifier device as in claim 1, wherein

the transistors are field effect transistors;

the bias circuit provides the bias signal that is a bias gate voltage for the at least one bank of transistors; and

the bias control circuit provides the control signals that are control gate voltages determined based on the detected voltage respectively for the banks of transistors other than the at least one bank of transistors.

6. The power amplifier device as in claim 1, wherein the bias control circuit configures at least two of the control signals to be a single control signal based on the detected voltage, and provides the single control signal commonly for at least two of the banks of transistors other than the at least one bank of transistors that is biased on, to control the output current.

7. The power amplifier device as in claim 1, further comprising an input load and an output matching network (OMN).

8. The power amplifier device as in claim 1, further comprising an input matching network (IMN).

9. The power amplifier device as in claim 1, further comprising transmission lines that connect the plurality of cells, the bias circuit, the bias control circuit, the input port, the output port and electronic components, wherein at least a segment of the transmission lines comprises a Composite Right and Left Handed Metamaterial (CRLH MTM).

10. The power amplifier device as in claim 7, wherein the OMN comprises a CRLH MTM.

11. The power amplifier device as in claim 8, wherein the IMN comprises a CRLH MTM.

12. The power amplifier device as in claim 1, further comprising a power divider that has a Composite Right and Left Handed Metamaterial structure to couple the input port to the first ends of the plurality of cells and to provide an impedance matching between the input port and the first ends.

13. The power amplifier device as in claim 1, further comprising a power combiner that has a Composite Right and Left Handed Metamaterial structure to couple the output port to the second ends of the plurality of cells and to provide an impedance matching between the output port and the second ends.

14. The power amplifier device as in claim 1, further comprising:

a first Composite Right and Left Handed Metamaterial (CRLH MTM) transmission line coupling the input port and the first ends of the plurality of cells;

a second CRLH MTM transmission line coupling the output port and the second ends of the plurality of cells;

a first switch coupled to the output port; and

a second switch coupled to the output port,

wherein the output port includes a first output point for outputting a signal at a first frequency and coupled to the first switch which controls the output at the first output point and a second output point for outputting a signal at a second, different frequency and coupled to the second switch which controls the output at the second output point.

15. The power amplifier device as in claim 1, wherein the RF signal detector circuit comprises a resistive coupler network and a diode.

16. The power amplifier device as in claim 1, wherein

the plurality of cells include a first cell and a second cell, the first cell comprising transistors segmented into a first bank and a second bank and the second cell comprising a third bank of transistors;

the bias circuit provides the bias signal to turn on the first bank and keep the first bank biased on during the operation; and

the bias control circuit determines a control signal based on the detected voltage, and provides the control signal commonly for the second bank and the third bank to control the output current.

17. The power amplifier device as in claim 16, wherein:

at least one of the first, second and third banks includes two or more field effect transistors, and gates of the two or more transistors are connected to one another to receive a control gate voltage, drains of the two or more transistors are connected to one another at a common drain potential, and sources of the two or more transistors are connected to one another at a common source potential.

18. The power amplifier device as in claim 16, wherein:

at least one of the first, second and third banks includes two or more bipolar junction transistors, and bases of the two or more transistors are connected to one another to receive a control base current, collectors of the two or more transistors are connected to one another at a common collector potential, and emitters of the two or more transistors are connected to one another at a common emitter potential.

19. The power amplifier device as in claim 1, wherein

the plurality of cells include a first cell that comprises a transistor with two or more bias levels;

the bias circuit provides the bias signal to keep a lowest bias level during the operation; and

the bias control circuit determines the control signals based on the detected voltage, and provides the control signals for a second lowest bias level and above to control the output current.

20. A power amplifier device, comprising:

an input port that receives an RF signal to be amplified in power;

an output port to output the RF signal that is amplified in power;

a cell, including a first end coupled to the input port, a second end coupled to the output port and transistors that are segmented into a first bank and a second bank to amplify power of the RF signal;

a variable output matching network (OMN) coupled between the cell and the output port to direct the RF signal that is amplified in power to the output port;

a bias circuit that provides a bias signal to turn on the first bank and keep the first bank biased on during amplification of the RF signal;

an RF signal detector circuit that detects the RF signal to produce a detected voltage; and

a bias control circuit that receives the detected voltage, produces first and second control signals based on the detected voltage, and directs the first control signal to the second bank to control an output current to increase with an increase in the first control signal and the second control signal to the variable OMN,

wherein the cell, the RF signal detector circuit, the bias circuit, the OMN and the bias control circuit are configured to increase an output power associated with the output current to expand a linear region and increase efficiency at a power back-off.

21. The power amplifier device as in claim 20, wherein the RF signal detector circuit is coupled to the input port to detect the RF signal associated with an input power.

22. The power amplifier device as in claim 20, wherein the RF signal detector circuit is coupled to the output port to detect the RF signal associated with the output power.

23. A power amplifier device for receiving an RF signal associated with an input power at an input port, amplifying the RF signal to an output power with a higher power level, and presenting the RF signal that is amplified and associated with the output power at an output port, the power amplifier device comprising:

a plurality of cells, each of which has a first end coupled to the input port and a second end coupled to the output port and comprises at least one bank of transistors;

a plurality of transmission lines connecting the plurality of cells, the output port, and the input port; and

a control circuit coupled to the cells to provide control signals respectively for the banks of transistors to vary the output power by individually switching on and off the banks of transistors.

24. The power amplifier as in claim 23, wherein at least one cell includes a plurality of transistors that are segmented into at least two banks of transistors.

25. The power amplifier as in claim 23, wherein at least a segment of the plurality of transmission lines comprises a Composite Right and Left Handed Metamaterial (CRLH MTM) structure.

26. The power amplifier as in claim 23, wherein the control circuit is configured to produce a common control signal as control signals for at least two banks of transistors.

27. A method of amplifying an RF signal associated with an input power to an output power with a higher power level to have the RF signal that is amplified and associated with the output power by using a power amplifier device comprising a plurality of cells, each of which has a first end coupled to an input port and a second end coupled to an output port and comprises one or more banks of transistors, the method comprising steps of:

applying a bias signal to turn on at least one bank of transistors in the plurality of cells and keep the at least one bank biased on during an operation;

detecting the RF signal;

converting the RF signal that is detected in the detecting step to a detected voltage;

producing control signals based on the detected voltage; and

applying the control signals respectively to the banks of transistors other than the at least one bank of transistors that is biased on, to control an output current to increase with an increase in the control signals to expand a linear region of the device and to increase efficiency of the device at a power back-off.

28. The method as in claim 27, wherein the RF signal in the detecting step is the RF signal associated with the input power.

29. The method as in claim 27, wherein the RF signal in the detecting step is the RF signal that is amplified and associated with the output power.

30. The method as in claim 27, wherein

the transistors are bipolar junction transistors;

the bias signal in the applying step is a bias base current for the at least one bank of transistors; and

the control signals are control base currents respectively for the banks of transistors other than the at least one bank of transistors.

31. The method as in claim 27, wherein

the transistors are field effect transistors;

the bias signal in the applying step is a bias gate voltage for the at least one bank of transistors; and

the control signals are control gate voltages respectively for the banks of transistors other than the at least one bank of transistors.

32. A method of amplifying an RF signal associated with an input power to an output power with a higher power level to have the RF signal that is amplified and associated with the output power by using a power amplifier device comprising a first cell and a second cell, each of which has a first end coupled to an input port and a second end coupled to an output port, the first cell comprising transistors segmented into a first bank of transistors and a second bank of transistors and the second cell comprising a third bank of transistors, the method comprising steps of:

applying a bias signal to turn on the first bank and keep the first bank biased on during an operation of the device;

detecting the RF signal;

converting the RF signal, which is detected in the detecting step, to a detected voltage using a DC conversion;

producing a control signal based on the detected voltage; and

applying the control signal to the second bank and the third bank, to control an output current to increase with an increase in the control signal to expand a linear region and increase efficiency at a power back-off condition.

33. A power amplifier device that provides a variable amplification to an RF signal based on a Composite Right and Left Handed Metamaterial structure, comprising:

an input port to receive an input RF signal to be amplified;

an output port to output an output RF signal that is amplified by amplifying the input RF signal;

a plurality of banks of one or more transistors that amplify RF signals and are coupled between the input port and the output port;

a plurality of transmission lines coupled to connect the banks of one or more transistors, the input port and the output port, at least one of the transmission lines including a Composite Right and Left Handed Metamaterial (CRLH MTM) structure; and

a control mechanism coupled to the banks of one or more transistors to selectively switch on or off one or more banks of one or more transistors and to control the one or more banks of one or more transistors that are switched on to vary a power level of the output RF signal and efficiency of the device.

34. The device as in claim 33, comprising:

an RF signal detector circuit that detects one of the input RF signal and the output RF signal to produce a detected DC voltage,

wherein the control mechanism receives the detected DC voltage to control, based on the detected DC voltage, bias of the one or more banks of one or more transistors that are switched in varying the power level of the output RF signal and the efficiency of the device, and

wherein at least one bank of one or more transistors is turned on and biased at a bias voltage that is not controlled by the control mechanism based on the detected DC voltage.

35. The device as in claim 34, wherein the banks of one or more transistors and the transmission lines are structured to operate at two or more signal frequencies of the input RF signal and to produce the output RF signal at the two or more signal frequencies.

36. The device as in claim 35, wherein the output port comprises a plurality of frequency specific output ports for outputting signals at designated output frequencies, and

wherein the device comprises switches coupled to the frequency specific output ports to direct RF signals at designated output frequencies to the frequency specific output ports, respectively.

37. The device as in claim 33, wherein the plurality of banks of one or more transistors include a first bank of one or more transistors, a second bank of one or more transistors and a third bank of one or more transistors,

wherein the device includes a first cell that has the first and second banks of one or more transistors and is coupled between the input and output ports, a second cell that has the third bank of one or more transistors and is coupled between the input and output ports, and a bias circuit coupled to the first bank of one or more transistors to provide a bias signal to turn on the first bank and keep the first bank biased on during an operation of the device, and

the control mechanism produces a common control signal based on a DC voltage associated with either the input RF signal or output RF signal and applies the common control signal to the second bank in the first cell and the third bank in the second cell to control biasing of the second and third banks to vary the power level of the output RF signal while increasing a linear operation range and efficiency of the device.