SINGLE POLY CMOS IMAGER
1 Assignment
0 Petitions
Accused Products
Abstract
More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.
-
Citations
58 Claims
-
1-44. -44. (canceled)
-
45. A method for fabricating a semiconductor device comprising:
-
forming a conductive material over a substrate; forming a resist material on the conductive material; patterning the resist material, leaving a portion of the conductive material exposed through the patterned resist layer; partially etching the conductive material using the patterned resist material as a mask such that a plurality of first portions of the conductive material have a first thickness and a plurality of second portions of the conductive material have a second thickness that is greater than the first thickness, each second portion having a first width and being separated from each adjacent second portion by a first distance; removing the patterned resist material; forming spacers on sidewalls of the plurality of second portions and over the plurality of first portions; etching the exposed conductive material to substantially remove the exposed portions of the plurality of first portions of the conductive material; and forming an insulating material on the plurality of second portions to form a plurality of gate structures. - View Dependent Claims (46, 47, 48, 49, 50, 51, 52, 53, 54)
-
-
55. A method for fabricating a semiconductor device comprising:
-
forming a conductive material over a substrate; partially etching a first portion of the conductive material such that the first portion of the conductive material has a first thickness and a second portion of the conductive material has a second thickness that is greater than the first thickness; forming a dielectric material to be located only on sidewalls of the second portion and over the first portion; etching the exposed conductive material to substantially remove the exposed portions of the first portion of the conductive material; and forming an insulating material on the plurality of second portions to form a gate structure. - View Dependent Claims (56, 57, 58)
-
Specification