SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20090302475A1
• Filed: 08/12/2009
• Published: 12/10/2009
• Est. Priority Date: 02/18/2008
• Status: Abandoned Application

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Harada, Takeshi, Ueki, Akira, Korogi, Hayato
• Application Number:
  US12/539,836
• Publication Number:
  US 20090302475A1
• Time in Patent Office: Days
• US Class Current: 257/761
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device includes a first interlayer insulating film, and a plurality of first interconnects formed in the first interlayer insulating film. A void is selectively formed between adjacent ones of the plurality of first interconnects in the first interlayer insulating film, and a cap insulating film is formed in a region located over the void and between the interconnects. Respective widths of a lower end and an upper end of the void are substantially the same as a gap between the interconnects located adjacent to the void, and the lower end of the void is located lower than lower ends of the first interconnects located adjacent to the void.

Claims

1. A semiconductor device, comprising:

a first insulating film formed over a semiconductor substrate;

a plurality of interconnects formed in the first insulating film, where a void is selectively formed between adjacent ones of the plurality of interconnects in the first insulating film; and

a second insulating film formed in a region located over the void and between the interconnects, wherein

respective widths of a lower end and an upper end of the void are substantially the same as a gap between the interconnects located adjacent to the void, and

the lower end of the void is located lower than lower ends of the interconnects located adjacent to the void.

2. The semiconductor device of claim 1, wherein

a portion located under the void in the first insulating film has a lower dielectric constant than that of portions located under the interconnects in the first insulating film.

3. The semiconductor device of claim 1, wherein

in a first gap between one interconnects, and a second gap between other interconnects in gaps between adjacent ones of the plurality of interconnects, the first gap is larger than the second gap, and no void is formed in a portion having the first gap, and the void is formed in a portion having the second gap.

4. The semiconductor device of claim 1, further comprising:

a third insulating film formed over the interconnects and the second insulating film, wherein

the third insulating film has a higher density than that of the first insulating film or the second insulating film.

5. The semiconductor device of claim 4, wherein

the third insulating film is a SiN film, a SiC film, or a SiCN film.

6. The semiconductor device of claim 1, further comprising:

a cap film formed on the plurality of interconnects so as to be in contact with the interconnects.

7. The semiconductor device of claim 6, wherein

the cap film is made of Co, Mn, W, Ta, or Ru, or an alloy containing at least one kind of a metal selected from Co, Mn, W, Ta, and Ru, or an oxide of Co, Mn, W, Ta, or Ru, or CuSiN, and

the cap film has a conductive property.

8. A method for manufacturing a semiconductor device, comprising the steps of:

(a) forming a first insulating film over a semiconductor substrate;

(b) forming a plurality of interconnect formation grooves in the first insulating film;

(c) embedding a conductive film in the interconnect formation grooves to form a plurality of interconnects;

(d) selectively forming a void formation groove between the interconnects in the first interlayer insulating film;

(e) forming a sacrificial film in the void formation groove;

(f) removing an upper part of the sacrificial film to form a recess in the upper part of the sacrificial film;

(g) forming a second insulating film in the recess; and

(h) after the step (g), removing the sacrificial film from the void formation groove to form a void between the interconnects in the first insulating film.

9. The method of claim 8, wherein

in the step (d), the void formation groove is formed so that a lower end of the void formation groove is located lower than lower ends of the interconnects.

10. The method of claim 8, wherein

in the step (h), a dielectric constant of a portion located under the void formation groove in the first insulating film is made smaller than that of portions located under the interconnects in the first insulating film.

11. The method of claim 8, wherein

in the step (d), in a portion having a first gap between one interconnects, and a portion having a second gap between other interconnects in gaps between adjacent ones of the plurality of interconnects, the first gap is made larger than the second gap, and no void formation groove is formed in the portion having the first gap, and the void formation groove is formed in the portion having the second gap.

12. The method of claim 8, further comprising the step of:

(i) after the step (h), forming a third insulating film over the interconnects and the second insulating film.

13. The method of claim 12, wherein

in the step (i), the third insulating film is formed so as to have a higher density than that of the first insulating film or the second insulating film.

14. The method of claim 12, wherein

the third insulating film is a SiN film, a SiC film, or a SiCN film.

15. The method of claim 8, further comprising the step of:

(j) between the steps (c) and (d), forming a cap film on the plurality of interconnects so that the cap film is in contact with the interconnects.

16. The method of claim 15, wherein

the cap film is made of Co, Mn, W, Ta, or Ru, or an alloy containing at least one kind of a metal selected from Co, Mn, W, Ta, and Ru, or an oxide of Co, Mn, W, Ta, or Ru, or CuSiN, and

the cap film has a conductive property.