Data dependent drive scheme and display

• US 20090303206A1
• Filed: 06/06/2008
• Published: 12/10/2009
• Est. Priority Date: 06/06/2008
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Ng, Sunny Yat-san
• Granted Patent: US 8,228,349 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2310/0235 Field-sequential colour display
• CPC Class Codes: G09G 2310/063 Waveforms for resetting the whole screen at once
• CPC Class Codes: G09G 2320/064 by time modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2360/18 Use of a frame buffer in a display terminal, inclusive of the display panel
• CPC Class Codes: G09G 3/2029 the sub-frames having non-binary weights
• CPC Class Codes: G09G 3/2033 with splitting one or more sub-frames corresponding to the most significant bits into two or more sub-frames
• CPC Class Codes: G09G 3/2037 with specific control of sub-frames corresponding to the least significant bits
• CPC Class Codes: G09G 3/3406 Control of illumination source illumination devices structurally associated with liquid crystal cells G02F1/1336
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

A method for writing data to a display includes the steps of receiving a plurality of data bits, where each bit is associated with a different pixel of the display, reading the value of each data bit, determining whether each data bits has an off-state value, and generating a disable signal if each data bit has an off-state value. Responsive to a disable signal, the method further includes suspending the transfer of data to the pixels of the display, turning off a light source (e.g., an LED, laser, etc.) for a time period dependent on the significance of at least one of the data bits, and/or forcing each pixel of the display into an off state for a time period dependent on the significance of at least one of the data bits. A display driver circuit for performing the methods of the present invention is also disclosed.

Claims

1. A method for writing data to a display, said method comprising:

receiving a plurality of data bits, each of said data bits associated with a different pixel of said display;

reading the value of each of said data bits;

determining whether each of said data bits has a value indicative of an off-state; and

generating a disable signal if each of said data bits has a value indicative of said off-state, said disable signal suspending the transfer of data to said pixels of said display.

2. A method according to claim 1, wherein:

said step of receiving a plurality of data bits further includes;

receiving a plurality of multi-bit data words, each of said multi-bit data words associated with a different pixel of said display, and

planarizing the bits of said plurality of multi-bit data words according to bit plane, each of said bit planes containing bits of equal significance; and

said step of reading the value of each of said data bits includes reading the value of each of said data bits according to bit plane.

3. A method according to claim 2, further comprising:

transferring said data bits in one of said bit planes to said pixels of said display; and

wherein at least one of said data bits in said bit plane transferred to said display has a value indicative of an on-state.

4. A method according to claim 2, further comprising:

suspending the transfer of said data bits in one of said bit planes to said pixels of said display; and

wherein each of said data bits in said bit plane not transferred to said pixels of said display has a value indicative of said off-state.

5. A method according to claim 4, further comprising forcing all of said pixels of said display into an off-state responsive to said disable signal.

6. A method according to claim 4, further comprising:

suspending the transfer of data bits in a first one of said bit planes where each pixel in said bit plane has a value indicative of said off-state;

suspending the transfer of data bits associated with a subsequent bit plane to said pixels of said display; and

wherein

said data bits in said first bit plane are sequential bits; and

each of said sequential bits indicates that the value of at least one data bit in said subsequent bit plane is indicative of said off-state.

7. A method according to claim 4, further comprising:

transferring said data bits in a first one of said bit planes where each pixel in said bit plane has a value indicative of said off-state to said pixels of said display;

suspending the transfer of data bits in a subsequent bit plane to said pixels of said display; and

wherein

said data bits in said first bit plane transferred to said pixels of said display are sequential bits; and

each of said sequential bits indicates that the value of at least one data bit in said subsequent bit plane is indicative of said off-state.

8. A method according to claim 4, further comprising turning off a light source in response to said disable signal for a time period greater than or equal to the significance of said data bits in said suspended bit plane, said light source for illuminating said display.

9. A method according to claim 8, further comprising:

turning off said light source in response to said disable signal for a time period greater than or equal to the combined significance of said data bits in said suspended bit plane and in a subsequent bit plane; and

wherein

said data bits of said suspended bit plane are sequential bits; and

each of said sequential bits indicates that the values of said data bits associated with said subsequent bit plane have said off-state.

10. A method according to claim 2, further comprising:

determining whether each of the data bits in each of said bit planes has a value indicative of said off-state; and

generating a separate disable signal for particular ones of said bit planes where each of said data bits in said particular bit plane has a value indicative of said off-state.

11. A method according to claim 10, wherein:

said step of generating said disable signal for particular ones of said bit planes further includes setting a plurality of indicators;

each of said indicators is associated with a different one of said bit planes; and

each of said indicators indicates whether each of said data bits in said associated bit plane has said value indicative of said off state.

12. A method according to claim 1, wherein said step of generating said disable signal includes setting an indicator if each of said read data bits has said value indicative of said off-state.

13. A method according to claim 1, wherein each of said plurality of data bits has a value indicative of said off-state, said method further comprising:

receiving a second plurality of data bits, each of said second plurality of data bits associated with a different pixel of said display;

suspending said second plurality of said data bits from being transferred to said pixels of said display; and

wherein

said plurality of data bits are sequential bits; and

said sequential data bits indicate that the value of each of said second plurality of data bits is indicative of said off-state.

14. A method according to claim 13, further comprising suspending said plurality of data bits from being transferred to said pixels of said display.

15. A method according to claim 1, further comprising:

receiving a second plurality of data bits, each of said second plurality of data bits associated with a different pixel of said display;

reading the value of each of said second plurality of data bits;

determining whether each of said second plurality of data bits has a value indicative of an off-state; and

generating a second disable signal if each of said second plurality of data bits has a value indicative of said off-state.

16. A method according to claim 1, wherein:

said step of receiving said plurality of data bits includes receiving a plurality of sequential bits, each of said sequential bits associated with one of said pixels of said display; and

each of said sequential bits indicates the value of at least one other bit associated with said pixel.

17. A method according to claim 1, further comprising forcing all of said pixels of said display into an off-state responsive to said disable signal.

18. A method according to claim 1, further comprising turning off a light source in response to said disable signal for a time period based on the significance of at least one of said plurality of data bits, said light source for illuminating said display.

19. A method according to claim 18, wherein said light source includes a light-emitting diode (LED).

20. A method according to claim 18, wherein said light source includes a laser.

21. An electronically-readable medium having code embodied therein for causing an electronic device to perform the method of claim 1.

22. A display driver circuit for driving a display having an array of pixels arranged in a plurality of columns and a plurality of rows, said display driver comprising:

an input terminal set operative to receive a plurality of data bits, each of said data bits associated with a different pixel of said display; and

detection logic operative to

read the value of each of said data bits,

determine whether each of said data bits has a value indicative of an off-state, and

generate a disable signal if each of said data bits has a value indicative of said off-state; and

wherein

said disable signal causes the transfer of data to said pixels of said display to be suspended.

23. A display driver circuit according to claim 22, further comprising:

a data planarizer operative to

receive a plurality of multi-bit data words via said input terminal set, each of said multi-bit data words associated with a different pixel of said display; and

planarize the bits of said plurality of multi-bit data words according to bit plane, each of said bit planes containing bits of equal significance; and

wherein said detection logic is further operative to read the value of each of said data bits according to bit plane.

24. A display driver circuit according to claim 23, further comprising:

an output controller operative to transfer said data bits in one of said bit planes to said pixels of said display; and

wherein at least one of said data bits in said bit plane transferred to said display has a value indicative of an on-state.

25. A display driver circuit according to claim 23, further comprising:

an output controller operative to suspend the transfer of said data bits in one of said bit planes to said pixels of said display; and

wherein each of said data bits in said bit plane not transferred to said pixels of said display has a value indicative of said off-state.

26. A display driver circuit according to claim 25, wherein said output controller is further operative to force all of said pixels of said display into an off-state responsive to said disable signal.

27. A display driver circuit according to claim 25, wherein:

said output controller is further operative to

suspend the transfer of data bits in a first one of said bit planes where each pixel in said first bit plane has a value indicative of said off-state, and

suspend the transfer of data bits in a second bit plane to said pixels of said display; and

wherein

said data bits in said first bit plane are sequential bits; and

each of said sequential bits indicates that the value of at least one data bit in said subsequent bit plane is indicative of said off-state.

28. A display driver circuit according to claim 25, wherein:

said output controller is further operative to

transfer said data bits in a first one of said bit planes where each pixel in said first bit plane has a value indicative of said off-state to said pixels of said display, and

suspend the transfer of data bits in a subsequent bit plane to said pixels of said display; and

wherein

said data bits in said first bit plane transferred to said pixels of said display are sequential bits; and

each of said sequential bits indicates that the value of at least one data bit in said subsequent bit plane is indicative of said off-state.

29. A display driver circuit according to claim 25, further comprising:

a light source for illuminating said display; and

a light source controller operative to turn off said light source in response to said disable signal for a time period greater than or equal to the significance of said data bits in said suspended bit plane.

30. A display driver circuit according to claim 29, wherein:

said light source controller is further operative to turn off said light source in response to said disable signal for a time period greater than or equal to the combined significance of said data bits in said suspended bit plane and in a subsequent bit plane;

said data bits of said suspended bit plane are sequential bits; and

each of said sequential bits indicates that the values of said data bits associated with said subsequent bit plane have said off-state.

31. A display driver circuit according to claim 23, wherein said detection logic is further operative to:

determine whether each of the data bits in each of said bit planes has a value indicative of said off-state; and

generate a separate disable signal for particular ones of said bit planes where each of said data bits in said particular bit plane has a value indicative of said off-state.

32. A display driver circuit according to claim 31, wherein:

said detection logic is further operative to generate separate disable signals by setting a plurality of indicators to a predetermined value, said predetermined value indicating that each of the data bits in one of said bit planes has a value indicative of said off-state;

each of said indicators is associated with a different one of said bit planes; and

each of said indicators indicates whether each of said data bits in said associated bit plane has said value indicative of said off state.

33. A display driver circuit according to claim 22, wherein said output controller is further operative to generate said disable signal by setting an indicator if each of said data bits has said value indicative of said off-state.

34. A display driver circuit according to claim 22, wherein:

each of said plurality of data bits has a value indicative of said off-state;

said input terminal set is further operative to receive a second plurality of data bits, each of said second plurality of data bits associated with a different pixel of said display;

said output controller is further operative to suspend the transfer of said second plurality of said data bits to said pixels of said display;

said plurality of data bits are sequential bits; and

said sequential data bits indicate that the value of each of said second plurality of data bits is indicative of said off-state.

35. A display driver circuit according to claim 34, wherein said output controller is further operative to suspend said plurality of data bits from being transferred to said pixels of said display.

36. A display driver circuit according to claim 22, wherein:

said input terminal set is further operative to receive a second plurality of data bits, each of said second plurality of data bits associated with a different pixel of said display; and

said output controller is further operative to

read the value of each of said second plurality of data bits;

determine whether each of said second plurality of data bits has a value indicative of an off-state; and

generate a second disable signal if each of said second plurality of data bits has a value indicative of said off-state.

37. A display driver circuit according to claim 22, wherein:

said plurality of data bits is a plurality of sequential bits, each of said sequential bits associated with one of said pixels of said display; and

each of said sequential bits indicates the value of at least one other bit associated with said pixel.

38. A display driver circuit according to claim 22, wherein said output controller is further operative to force all of said pixels of said display into an off-state responsive to said disable signal.

39. A display driver circuit according to claim 22, further comprising:

a light source for illuminating said display; and

a light source controller operative to turn off said light source in response to said disable signal for a time period based on the significance of at least one of said plurality of data bits.

40. A display driver circuit according to claim 39, wherein said light source includes a light-emitting diode (LED).

41. A display driver circuit according to claim 39, wherein said light source includes a laser.