METHOD AND A TRANSCEIVER FOR TRANSMITTING DATA

• US 20090303933A1
• Filed: 08/14/2009
• Published: 12/10/2009
• Est. Priority Date: 03/25/2002
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Goris, Norman, Canning, Noel Charles, Scheit, Wolfgang, Morzinek, Harald Oliver
• Granted Patent: US 8,391,301 B2
• Time in Patent Office: Days
• US Class Current: 370/328
• CPC Class Codes: H04L 1/0009 by adapting the channel coding H04L1/1812 takes precedence
• CPC Class Codes: H04L 1/1628 List acknowledgements, i.e. the acknowledgement message consisting of a list of identifiers, e.g. of sequence numbers H04L1/1614 takes precedence
• CPC Class Codes: H04L 1/1809 Selective-repeat protocols
• CPC Class Codes: H04L 1/1835 Buffer management
• CPC Class Codes: H04L 1/1874 Buffer management

Abstract

The present invention provides a method for transmitting data and a transceiver. In one embodiment, the method includes: (1) generating data blocks of a data package in a first transceiver to transmit to a second transceiver, the first transceiver including a micro-controller coupled to a digital signal processor, (2) generating identification data in the first transceiver for the data blocks, wherein the identification data is an index of a list of the data blocks to be transmitted and each of the data blocks is transmitted with the index and (3) identifying the data blocks to be transmitted to the second transceiver based on the identification data, wherein the microcontroller employs the index to manage transmission of the data blocks.

Claims

1. A method for transmitting data, comprising:

generating data blocks of a data package in a first transceiver to transmit to a second transceiver, said first transceiver including a micro-controller coupled to a digital signal processor;

generating identification data in said first transceiver for said data blocks, wherein said identification data is an index of a list of said data blocks to be transmitted and each of said data blocks is transmitted with said index; and

identifying said data blocks to be transmitted to said second transceiver based on said identification data, wherein said microcontroller employs said index to manage transmission of said data blocks.

2. The method according to claim 1 further comprising transmitting said data blocks with said identification data in data frames to said second transceiver and identifying a transmission status of said data blocks transmitted to said second transceiver based on receiving said identification data in return from said second transceiver.

3. The method according to claim 1 wherein said generating said data blocks and said identification data is performed by said micro-controller, said method further comprising sending said data blocks and said identification data from said micro-controller to said digital signal processor in advance of transmission of said data blocks and storing said data blocks and said identification data in said digital signal processor until time for said transmitting.

4. The method according to claim 3 further comprising providing an interleaved communication between said micro-controller and said digital signal processor.

5. The method according to claim 3 further comprising:

transmitting acknowledgment signals with said identification data from said second transceiver to a receiving buffer of said transceiver; and

providing said acknowledgment signals with said identification data to said micro-controller via said digital signal processor to indicate said transmission status of said data blocks.

6. The method according to claim 1 further comprising generating and transmitting data blocks of multiple data packages.

7. The method according to claim 2 wherein said transmitting is via a multi-slot network, said method further comprising receiving a message to trigger said transmitting wherein said message is an Uplink State Flag from a base station that indicates which slot of said multi-slot network to use for said transmitting of said data blocks.

8. A transceiver capable of transmitting data blocks, comprising:

a micro-controller configured to generate data blocks to transmit to a second transceiver and generate identification data for said data blocks, wherein said identification data is an index of a list of said data blocks to be transmitted and each of said data blocks is transmitted with said index, said micro-controller configured to employ said index to manage transmission of said data blocks; and

a digital signal processor configured to receive said data blocks from said micro-controller and store said data blocks until time for said transmit, said digital signal processor further configured to provide, to said micro-controller, said identification data that has been returned from said second transceiver after being transmitted thereto with said data blocks.

9. The transceiver according to claim 8 further comprising a timing unit for said data blocks.

10. The transceiver according to claim 8 wherein said transceiver is configured to operate in a General Packet Radio Service (GPRS) network.

11. The transceiver according to claim 8 wherein said transceiver is a mobile station.

12. The transceiver according to claim 8 wherein said micro-controller is further configured to provide said data blocks to transmit to said digital signal processor.

13. The transceiver according to claim 8 wherein said micro-controller is configured to generate data blocks of different data packages.

14. The transceiver according to claim 8 wherein said micro-controller is configured to interleavedly communicate with said digital signal processor.

15. The transceiver according to claim 8 further comprising a receiving buffer configured to receive acknowledgment signals and said identification data from said second transceiver and send said acknowledgment signals and said identification data from said second transceiver to said digital signal processor.

16. The transceiver according to claim 15 wherein a number of data blocks sent by said micro-controller to said digital signal processor is equivalent to said acknowledgment signals received by said receiving buffer.

17. The transceiver according to claim 8 wherein said micro-controller is further configured to employ said returned identification data to determine which of said data blocks were transmitted to said second transceiver.

18. A transceiver, comprising:

a micro-controller configured to generate at least one data block and identification data associated with said data block, wherein said identification data is an index of a list of said data blocks to be transmitted and said micro-controller employs said index to manage transmission of said data block;

a digital signal processor configured to receive said data block and said information data from said micro-controller and store said data block until time for transmission; and

a transmit/receive buffer configured to receive said data block and information data from said digital signal processor for transmission to a second transceiver.

19. The transceiver according to claim 18 wherein said transmit/receive buffer is further configured to receive an acknowledgment signal and said information data from said second transceiver and said micro-controller is configured to receive said acknowledgment signal and said information data from said transmit/receive buffer and determine a transmission status of said data block based thereon.

20. The transceiver according to claim 19 wherein said digital signal processor is configured to store said data block until said time of transmission to comply with timing requirements of a General Packet Radio Service (GPRS) network, said time of transmission determined by said digital signal processor based on a message received by said transceiver.