LOW TEMPERATURE AMORPHOUS SILICON SACRIFICIAL LAYER FOR CONTROLLED ADHESION IN MEMS DEVICES

• US 20090305010A1
• Filed: 06/05/2008
• Published: 12/10/2009
• Est. Priority Date: 06/05/2008
• Status: Active Grant

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Qualcomm MEMS Technologies Incorporated (Qualcomm, Inc.)
• Inventors: Chung, Wonsuk, Tu, Thanh Nghia, Yan, Xiaoming, Webster, James Randolph
• Granted Patent: US 7,851,239 B2
• Time in Patent Office: Days
• US Class Current: 428/209
• CPC Class Codes: B81B 2201/042 Micromirrors, not used as optical switches
• CPC Class Codes: B81B 3/0008 Structures for avoiding electrostatic attraction, e.g. avoiding charge accumulation
• CPC Class Codes: B81C 2201/0107 Sacrificial metal
• CPC Class Codes: B81C 2201/0109 Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
• CPC Class Codes: B81C 2201/115 Roughening a surface
• CPC Class Codes: G02B 26/001 based on interference in an adjustable optical cavity interference filters G02B5/28; devices or arrangements using multiple reflections in spectrometry or monochromators G01J3/26
• CPC Class Codes: Y10T 428/24917 including metal layer

Abstract

Methods of fabricating an electromechanical systems device that mitigate permanent adhesion, or stiction, of the moveable components of the device are provided. The methods provide an amorphous silicon sacrificial layer with improved and reproducible surface roughness. The amorphous silicon sacrificial layers further exhibit excellent adhesion to common materials used in electromechanical systems devices.

Claims

1. A method of manufacturing a microelectromechanical systems (MEMS) device comprising:

selecting deposition conditions that comprise a deposition temperature that is less than or equal to about 250°

C.; and

depositing a sacrificial layer over an optical stack under the selected deposition conditions, wherein the sacrificial layer comprises amorphous silicon.

2. The method according to claim 1, wherein the selected deposition conditions comprise a deposition technique selected from chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), and evaporation deposition.

3. The method according to claim 1, wherein the selected deposition conditions comprise PECVD.

4. The method according to claim 1, wherein the selected deposition conditions comprise providing a feed gas, the feed gas comprising a silane.

5. The method according to claim 4, wherein the silane is selected from SiH₄, SiHCl₃, SiH₂Cl₂, and SiH₃Cl.

6. The method according to claim 1, further comprising selecting the deposition conditions so that the sacrificial layer, as deposited, has a surface roughness that is greater than about 1.0 nm RMS.

7. The method according to claim 1, further comprising selecting the deposition conditions so that the sacrificial layer, as deposited, has a surface roughness that is greater than about 1.5 nm RMS.

8. The method according to claim 1, further comprising selecting the deposition conditions so that the sacrificial layer, as deposited, has a surface roughness that is greater than about 1.8 nm RMS.

9. The method according to claim 1, wherein the optical stack comprises a dielectric layer.

10. The method according to claim 9, wherein the dielectric layer comprises a dielectric material selected from a silicon oxide and an aluminum oxide.

11. The method according to claim 9, comprising depositing the sacrificial layer onto the dielectric layer.

12. The method according to claim 1, further comprising:

depositing a metal layer over the sacrificial layer.

13. The method according to claim 12, wherein the metal layer comprises a metal selected from aluminum, nickel, and alloys thereof.

14. The method according to claim 12, wherein the metal layer comprises aluminum.

15. The method according to claim 12, wherein the metal layer, as deposited, has a surface that is in contact with the sacrificial layer, said surface having a surface roughness that is effective to reduce stiction between the metal layer and the optical stack after removal of the sacrificial layer to form a cavity.

16. The method according to claim 15, wherein the surface roughness of the metal layer is greater than about 1.0 nm RMS.

17. The method according to claim 15, wherein the surface roughness of the metal layer is greater than about 1.5 nm RMS.

18. The method according to claim 15, wherein the surface roughness of the metal layer is greater than about 1.8 nm RMS.

19. The method according to claim 12, further comprising forming a support structure to support the metal layer over the optical stack after removal of the sacrificial layer to form a cavity.

20. The method according to claim 19, wherein forming the support structure comprises removing at least a portion of the sacrificial material to form an aperture.

21. The method according to claim 20, further comprising filling the aperture with a support material.

22. The method according to claim 12, further comprising:

etching the sacrificial layer with an etchant.

23. The method according to claim 22, wherein the etchant comprises XeF₂.

24. The method according to claim 22, further comprising etching the sacrificial layer to form a cavity.

25. The method according to claim 24, wherein the cavity comprises an interferometric cavity between the metal layer and the optical stack.

26. The method according to claim 1, wherein the deposition temperature is in the range of about 150°

C. to about 250°

C.

27. The method according to claim 4, wherein the feed gas further comprises a non-reactive gas selected from helium, neon, argon, krypton, xenon, and combinations thereof.

28. The method according to claim 4, wherein the feed gas further comprises a non-reactive gas selected from helium and argon.

29. The method according to claim 4, wherein the feed gas further comprises hydrogen.

30. The method according to claim 4, wherein the feed gas further comprises a reactant selected from N₂, N₂O, NH₃, NF₃, O₂, and combinations thereof.

31. The method according to claim 4, wherein the feed gas further comprises N₂O.

32. The method according to claim 30, wherein the selected deposition conditions comprise varying the amount of the reactant in the feed gas during the depositing of the sacrificial layer such that the sacrificial layer comprises a compositionally heterogeneous material.

33. The method according to claim 30, wherein the sacrificial layer comprises a lower region and an upper region, the lower region being compositionally distinct from the upper region.

34. The method according to claim 33, wherein the lower region has enhanced adhesion to the optical stack, as compared to the upper region.

35. The method according to claim 34, wherein the lower region comprises one or more of a silicon oxide, a silicon nitride, a silicon oxynitride, and amorphous silicon.

36. The method according to claim 33, wherein the upper region has distinct surface topography, as compared to the surface topography of the lower region.

37. An unreleased MEMS substrate comprising:

an optical stack;

a sacrificial layer comprising amorphous silicon; and

a metal layer overlaying and forming an interface with the sacrificial layer;

wherein the interface of the sacrificial layer and the metal layer comprises a surface roughness that is effective to reduce stiction between the metal layer and the optical stack after removal of the sacrificial layer to form a cavity.

38. The unreleased MEMS substrate according to claim 37, wherein the interface has a roughness that is greater than about 1.0 nm RMS.

39. The unreleased MEMS substrate according to claim 37, wherein the interface has a roughness that is greater than about 1.5 nm RMS.

40. The unreleased MEMS substrate according to claim 37, wherein the interface has a roughness that is greater than about 1.8 nm RMS.

41. The unreleased MEMS substrate according to claim 37, wherein the sacrificial layer comprises a lower region and an upper region, the lower region being compositionally distinct from the upper region.

42. The unreleased MEMS substrate according to claim 41, wherein the lower region has enhanced adhesion to the optical stack, as compared to the upper region.

43. The method according to claim 42, wherein the lower region comprises one or more of a silicon oxide, a silicon nitride, a silicon oxynitride, and amorphous silicon.

44. The unreleased MEMS substrate according to claim 37, wherein the metal layer comprises aluminum.

45. The unreleased MEMS substrate according to claim 37, wherein the optical stack comprises a dielectric layer.

46. The method according to claim 45, wherein the dielectric layer comprises a dielectric material selected from a silicon oxide and an aluminum oxide.

47. The unreleased MEMS substrate according to claim 37, wherein the optical stack comprises an electrode layer and a partially reflective layer.