Apparatus and Method for Processing Wirelessly Communicated Information Within an Electronic Device

• US 20090307520A1
• Filed: 06/06/2008
• Published: 12/10/2009
• Est. Priority Date: 06/06/2008
• Status: Active Grant

• Current Assignee: Roche Diabetes Care Inc. (Roche Holding AG)
• Original Assignee: Roche Diagnostics International AG (Roche Holding AG)
• Inventors: Anliker, Urs, Anselmi, Bruno, Von Buren, Thomas, Schnell, Urban, Frikart, Marcel, Fehr, Jean-Noel, Rickert, Christoph
• Granted Patent: US 8,117,481 B2
• Time in Patent Office: Days
• US Class Current: 713/600
• CPC Class Codes: G06F 1/12 Synchronisation of different clock signals provided by a plurality of clock generators
• CPC Class Codes: G06F 1/14 Time supervision arrangements, e.g. real time clock

Abstract

An electronic device (12) for processing information wirelessly received from another electronic device (14) or to be wirelessly sent to the another electronic device (14) may include a first processor (20) that controls only wireless communications with the another electronic device (14) and excluding operations associated only with the electronic device (12), a second processor (16) that controls the operations associated only with the electronic device (12) and excluding the wireless communications with the another device (14), and a clock circuit (24, 190) that is separate and independent from the first and second processors (20, 16) and that produces at least one timing signal that regulates synchronous exchange of the information between the first and second processors (20, 16).

Claims

1. An electronic device (12) for processing information wirelessly received from another electronic device (14) or to be wirelessly sent to the another electronic device (14), the electronic device (12) comprising:

a first processor (20) that controls only wireless communications with the another electronic device (14) and excluding operations associated only with the electronic device (12),

a second processor (16) that controls the operations associated only with the electronic device (12) and excluding the wireless communications with the another device (14), and

a clock circuit (24, 190) that is separate and independent from the first and second processors (20, 16) and that produces at least one timing signal that regulates synchronous exchange of the information between the first and second processors (20, 16).

2. The electronic device (12) of claim 1 wherein the clock circuit (24, 190) is a real time clock circuit (24) and the at least one timing signal includes a timing reference signal,

and wherein the first and second processors (20, 16) each comprise internal timing information,

and wherein the first and second processors (20, 16) each synchronize their internal timing information to the timing reference signal.

3. The electronic device (12) of claim 2 wherein the first and second processors (20, 16) each comprise one or more internal timers and a time base,

and wherein the first and second processors (20, 16) each update their one or more internal timers and time base with the timing reference signal prior to synchronizing their internal timing information to the timing reference signal.

4. The electronic device (12) of claim 2 wherein the first and second processors (20, 16) are each configured to request the timing reference signal from the real time clock circuit prior to exchange of the information between the first and second processors (20, 16).

5. The electronic device (12) of claim 4 wherein the first and second processors (20, 16) are each configured to request the timing reference signal at different instants in time relative to each other.

6. The electronic device (12) of claim 1 wherein the clock circuit (24, 190) is a clock generator (190) and the at least one timing signal includes at least one clock signal,

and wherein the first and second processors (20, 16) each exchange the information according to the at least one clock signal.

7. The electronic device (12) of claim 6 wherein the information exchanged between the first and second processors (20, 16) comprises one or more information packets that each includes a number of data bits,

and wherein the at least one clock signal comprises a data bit clock signal by which each of the number of data bits of an information packet is exchanged between the first and second processors (20, 16).

8. The electronic device (12) of claim 7 wherein the at least one timing signal further includes an information packet clock signal by which each information packet is exchanged between the first and second processors (20, 16).

9. The electronic device (12) of claim 1 wherein the first processor (20) comprises:

a communication processor (74) that controls wireless communications with the another electronic device (14), and

a first kernel processor (72) that exchanges information between the communication processor (74) and the second processor (16) according to the at least one timing signal.

10. The electronic device (12) of claim 9 wherein the second processor (16) comprises:

a main processor (54) that controls the operations associated only with the electronic device (12), and

a second kernel processor (60) that exchanges information between the main processor (54) and the first kernel processor (72) according to the at least one timing signal.