DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20090309103A1
• Filed: 06/16/2009
• Published: 12/17/2009
• Est. Priority Date: 06/17/2008
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Yagi, Iwao
• Granted Patent: US 8,063,405 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: G02F 1/133305 Flexible substrates, e.g. plastics, organic film
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/133555 Transflectors
• CPC Class Codes: G02F 1/136218 Shield electrodes
• CPC Class Codes: H10K 19/10 comprising field-effect transistors

Abstract

A display device includes source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. The source/drain electrodes and the pixel electrode are formed on the substrate and in contact with each other. The insulating partition wall layer is formed on the substrate and provided with a first opening extending to between the source electrode and the drain electrode and a second opening formed on the pixel electrode and extending to the pixel electrode. The channel-region semiconductor layer is formed on the bottom of the first opening. The insulating film is formed on the partition wall layer so as to cover the first opening including the channel-region semiconductor layer. The oriented film covers the first opening from above the insulating film and the second opening from the pixel electrode.

Claims

1. A display device, comprising:

a source electrode and a drain electrode formed on a substrate;

a pixel electrode formed on said substrate and in contact with said source electrode or said drain electrode;

an insulating partition wall layer formed on said substrate and having a first opening extending to between said source electrode and said drain electrode and a second opening formed on said pixel electrode and extending to said pixel electrode;

a channel-region semiconductor layer formed on the bottom of said first opening;

an insulating film formed on said partition wall layer so as to cover said first opening including said channel-region semiconductor layer; and

an oriented film covering said first opening from above said insulating film and covering said second opening from said pixel electrode.

2. The display device according to claim 1, wherein

a semiconductor layer made of the same material as that of said channel-region semiconductor layer is formed on the upper part of said partition wall layer.

3. The display device according to claim 1, wherein

said channel-region semiconductor layer is made of an organic material.

4. The display device according to claim 1, further comprising:

an opposing substrate facing said substrate and a liquid crystal layer disposed between said substrate and said opposing substrate.

5. The display device according to claim 1, wherein

said thin-film transistor is a bottom-gate type transistor, and

a gate electrode and a gate insulating film are formed between said substrate and said channel-region semiconductor layer in order from said substrate.

6. The display device according to claim 1, wherein

said pixel electrode is a transmissive display electrode, and

a reflective pixel electrode is electrically connected to said transmissive display electrode on the upper layer of said partition wall layer through said insulating film.

7. The display device according to claim 6, further comprising:

a third opening formed in said partition wall layer and extending to said source electrode or said drain electrode; and

a connection hole extending to said source electrode or said drain electrode in the inner side of said third opening is formed in at least said insulating film, wherein

said reflective pixel electrode is connected to said transmissive display electrode through said source electrode or said drain electrode exposed at the bottom of said connection hole.

8. The display device according to claim 6, further comprising:

a third opening extending to said source electrode or said drain electrode is formed in said partition wall layer; and

a semiconductor layer placed on the bottom of said third opening and made of the same material as that of said channel-region semiconductor layer, wherein

a connection hole is formed in said insulating film and said semiconductor layer placed on the bottom of said third opening, where said connection hole extends to said source electrode or said drain electrode in the inside of said third opening, while being insulated from said semiconductor layer on said partition wall layer, and

said reflective pixel electrode is connected to said transmissive display electrode through said source electrode or said drain electrode exposed at the bottom of said connection hole.

9. The display device according to claim 6, wherein

a height of the position of said reflective pixel electrode with respect to a height of the position of said transmissive display electrode is adjusted with reference to a height of said partition wall layer.

10. The display device according to claim 1, wherein

said thin-film transistor is a top-gate type transistor;

and

a gate electrode is formed on said channel-region semiconductor layer through a gate insulating film.

11. A method of manufacturing a display device, comprising the steps of:

forming source/drain electrodes of a thin-film transistor on said substrate, while forming a pixel electrode connected to said source/drain electrodes;

forming an insulating partition wall layer on said substrate, where said partition wall layer has a first opening extending to between said source electrode and said drain electrode and a second opening located on said pixel electrode and extending to said pixel electrode; and

forming a channel-region semiconductor layer constructed of a semiconductor on the bottom of said first opening.

12. The method of manufacturing a display device according to claim 11, wherein

said step of forming said channel-region semiconductor layer includes depositing a semiconductor layer from above said partition wall layer to form a channel-region semiconductor layer formed of said semiconductor layer on the bottom of said first opening so as to be separate from the upper part of said partition layer.

13. The method of manufacturing a display device according to claim 12, wherein

said step of forming said channel-region semiconductor layer includes:

depositing a semiconductor layer from above said partition wall layer to form a channel-region semiconductor layer formed of said semiconductor layer on the bottom of said first opening so as to be separate from the upper part of said partition layer; and

forming a semiconductor layer made of the same material as that of said channel-region semiconductor layer on the bottom of said second opening, wherein

a step of removing said semiconductor from the bottom of said second opening is performed after said step of forming said channel-region semiconductor layer.

14. The method of manufacturing a display device according to claim 11, wherein

said step of forming said channel-region semiconductor layer includes:

employing a technique of selectively preparing a solution containing a semiconductor material on the bottom of said first opening only and forming a channel-region semiconductor constructed of said semiconductor layer on the bottom of said first opening.

15. A semiconductor device, comprising:

a source electrode and a drain electrode on a substrate;

a conductive pattern formed on said substrate and in contact with said source electrode or said drain electrode;

an insulating partition wall layer having a first opening extending to between said source electrode and said drain electrode and a second opening located on the center of said conductive pattern and extending to said conductive pattern;

a channel-region semiconductor layer formed on the bottom of said first opening;

an insulating film formed on said partition wall layer so as to cover said first opening including said channel-region semiconductor layer; and

an oriented film covering said first opening from above said insulating film and covering said second opening from said conductive pattern.

16. A method of manufacturing a semiconductor device, comprising the steps of

forming source/drain electrodes of a thin-film transistor on a substrate, while forming a pixel electrode connected to said source/drain electrodes;

forming an insulating partition wall layer on said substrate, where said partition wall layer has a first opening extending to between said source electrode and said drain electrode and a second opening located on the center of said conductive pattern and extending to said conductive pattern; and

forming a channel-region semiconductor layer formed of said semiconductor layer on the bottom of said first opening.

17. The method of manufacturing a semiconductor device according to claim 16, wherein

said step of forming said channel-region semiconductor layer includes depositing a semiconductor layer from above said partition wall layer to form a channel-region semiconductor layer formed of said semiconductor layer on the bottom of said first opening so as to be separate from the upper part of said partition layer.

18. The method of manufacturing a semiconductor device according to claim 17, wherein

said step of forming said channel-region semiconductor layer includes:

depositing a semiconductor layer from above said partition wall layer to form a channel-region semiconductor layer formed of said semiconductor layer on the bottom of said first opening so as to be separate from the upper part of said partition layer; and

forming a semiconductor layer made of the same material as that of said channel-region semiconductor layer on the bottom of said second opening, wherein

a step of removing said semiconductor from the bottom of said second opening is performed after said step of forming said channel-region semiconductor layer.

19. The method of manufacturing a semiconductor device according to claim 16, wherein

said step of forming said channel-region semiconductor layer includes:

employing a technique of selectively preparing a solution containing a semiconductor material on the bottom of said first opening only and

forming a channel-region semiconductor constructed of said semiconductor layer on the bottom of said first opening.