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Integrated Circuits Having a Contact Region and Methods for Manufacturing the Same

  • US 20090309152A1
  • Filed: 06/11/2008
  • Published: 12/17/2009
  • Est. Priority Date: 06/11/2008
  • Status: Active Grant
First Claim
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1. An integrated circuit comprising a memory cell arrangement, the memory cell arrangement comprising:

  • a fin structure extending in a first direction, the fin structure comprising;

    a first memory cell structure comprising a plurality of first active regions of a first plurality of memory cells coupled with each other in serial connection in the first direction;

    a second memory cell structure comprising a plurality of second active regions of a second plurality of memory cells coupled with each other in serial connection in the first direction, wherein the second memory cell structure is disposed above the first memory cell structure; and

    a memory cell contact structure configured to electrically couple the first memory cell structure and the second memory cell structure, wherein the memory cell contact structure has a staircase structure, a first step of which is configured to electrically contact the first memory cell structure, and a second step of which is configured to electrically contact the second memory cell structure.

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