Method for Making Micro-Electromechanical System Devices

• US 20090311819A1
• Filed: 10/02/2008
• Published: 12/17/2009
• Est. Priority Date: 10/18/2007
• Status: Active Grant

• Current Assignee: Asia Pacific Microsystems Incorporated (Unimicron Technology Corporation)
• Original Assignee: Asia Pacific Microsystems Incorporated (Unimicron Technology Corporation)
• Inventors: Wu, Mingching, Chang, Tso-Chi
• Granted Patent: US 7,824,945 B2
• Time in Patent Office: Days
• US Class Current: 438/51
• CPC Class Codes: B81B 2203/0118 Cantilevers
• CPC Class Codes: B81C 1/0015 Cantilevers switches using MEMS H01H1/0036; electrostatic relays using micromechanics H01H59/0009; microelectro-mechanical resonators H03H9/02244
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/16195 Flat cap [not enclosing an internal cavity]

Abstract

A method for making micro-electromechanical system devices includes: (a) forming a sacrificial layer on a device wafer; (b) forming a plurality of loop-shaped through-holes in the sacrificial layer so as to form the sacrificial layer into a plurality of enclosed portions; (c) forming a plurality of cover caps on the sacrificial layer such that the cover caps respectively enclose the enclosed portions of the sacrificial layer; (d) forming a device through-hole in each of active units of the device wafer so as to form an active part suspended in each of the active units; and (e) removing the enclosed portions of the sacrificial layer through the device through-holes in the active units of the device wafer.

Claims

1. A method for making micro-electromechanical system devices, comprising:

(a) forming a sacrificial layer on a front side of a device wafer which has a plurality of active units;

(b) forming a plurality of loop-shaped through-holes in the sacrificial layer so as to form the sacrificial layer into a plurality of enclosed portions, each of which is surrounded by a loop-shaped route of a respective one of the loop-shaped through-holes and each of which is aligned with a respective one of the active units of the device wafer;

(c) forming a plurality of cover caps on the sacrificial layer such that each of the cover caps is aligned with a respective one of the active units of the device wafer and extends into a respective one of the loop-shaped through-holes in the sacrificial layer to contact the front side of the device wafer so as to cooperate with a respective one of the active units of the device wafer to enclose a respective one of the enclosed portions of the sacrificial layer;

(d) forming a device through-hole in each of the active units of the device wafer so as to form an active part suspended in each of the active units of the device wafer and so as to expose a respective one of the enclosed portions of the sacrificial layer from a back side of the device wafer; and

(e) removing the enclosed portions of the sacrificial layer through the device through-holes in the active units of the device wafer.

2. The method of claim 1, wherein the device wafer includes an active layer, a suspender layer, and an insulator layer sandwiched between the active layer and the suspender layer, the suspender layer and the active layer defining the front and back sides of the device wafer, respectively, the sacrificial layer being formed on the suspender layer in step (a), the device through-hole in each of the active units extending at least through the active layer and the insulator layer.

3. The method of claim 2, wherein the suspender layer is patterned to form a plurality of through-holes therein at each of the active units prior to the formation of the sacrificial layer thereon, the device through-hole in each of the active units being in spatial communication with the through-holes in the suspender layer at the respective one of the active units, the sacrificial layer extending into the through-holes in the suspender layer in step (a).

4. The method of claim 3, wherein the active layer is made from silicon, the insulator layer is made from silicon dioxide, and the suspender layer is made from silicon.

5. The method of claim 3, wherein formation of the cover caps on the sacrificial layer in step (c) is conducted by forming a cap-forming layer on the sacrificial layer such that the cap-forming layer extends into the through-holes, followed by patterning the cap-forming layer through photolithographic techniques.

6. The method of claim 5, wherein formation of the device through-hole in each of the active units of the device wafer is conducted by forming a first hole in the active layer, followed by forming a second hole in the insulator layer that is in spatial communication with the first hole in the active layer and the through-holes in the suspender layer at the respective one of the active units.

7. The method of claim 6, wherein formation of the first hole in the active layer is conducted through inductively coupled plasma etching techniques.

8. The method of claim 6, wherein formation of the second hole in the insulator layer is conducted through wet etching techniques.

9. The method of claim 1, wherein the sacrificial layer is made from a photoresist material.

10. The method of claim 5, wherein the cap-forming layer is made from a photosensitive material.

11. The method of claim 5, wherein the cap-forming layer is made from bisbenzocyclobutene.

12. The method of claim 1, wherein each of the cover caps includes a seed layer of a first metal formed on the sacrificial layer and extending into a respective one of the loop-shaped through-holes in the sacrificial layer, and a plating layer of a second metal formed on the seed layer.

13. The method of claim 12, wherein the first metal is selected from the group consisting of Ti, Cu, and Al, and the second metal is selected from the group consisting of Ni, Cu, and Ni—

Fe.

14. The method of claim 12, wherein formation of the seed layer is conducted through vapor deposition techniques, and formation of the plating layer is conducted through plating techniques.

15. The method of claim 14, further comprising forming a plurality of cap-defining walls on the front side of the device wafer after formation of the seed layer and prior to formation of the plating layer such that each of the cap-defining walls cooperates with the respective seed layer to define a loop-shaped gap therebetween, the plating. layer of each of the cover caps extending into the loop-shaped gap between a respective one of the cap-defining walls and the seed layer of the respective one of the cover caps.

16. The method of claim 15, wherein the cap-defining walls are made from a photoresist material.

17. The method of claim 16, further comprising removing the cap-defining walls during removal of the enclosed portions of the sacrificial layer in step (e).

18. The method of claim 1, further comprising attaching a circuit wafer to the back side of the device wafer after step (e) so as to cooperate with each of the cover caps and the device wafer to define an enclosed cavity there among for enclosing the active part of a respective one of the active units of the device wafer.

19. The method of claim 18, wherein the circuit wafer is adhesively bonded to the device wafer through a plurality of adhesive pads.

20. The method of claim 19, wherein the adhesive pads are made from bisbenzocyclobutene.

21. The method of claim 19, further comprising cutting the circuit wafer and the device wafer of the assembly of the circuit wafer, the device wafer and the cover caps so as to form a plurality of individual micro-electromechanical system devices.

22. The method of claim 21, further comprising coupling the device wafer to the circuit wafer through wire bonding techniques for each of the micro-electromechanical system devices, and packaging each of the micro-electromechanical system devices by disposing each of the micro-electromechanical system devices in a ceramic container, followed by sealing hermetically the ceramic container using a cover plate.

23. The method of claim 21, further comprising coupling the device wafer to the circuit wafer through wire bonding techniques for each of the micro-electromechanical system devices, and packaging each of the micro-electromechanical system devices by plastic molding techniques.