Relative Positioning of Circuit Elements in Circuit Design

• US 20090313594A1
• Filed: 07/20/2009
• Published: 12/17/2009
• Est. Priority Date: 05/26/2005
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Synopsys Incorporated
• Inventors: Arunachalam, Anand
• Granted Patent: US 8,239,792 B2
• Time in Patent Office: Days
• US Class Current: 716/119
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement

Abstract

Methods and apparatuses are disclosed for generating a placed, routed, and optimized circuit design. Other embodiments are a circuit design and circuit created with the technology. The placed, routed, and optimized circuit design obeys relative positioning rules of a set of the circuit elements. Such relative positioning rules were created specifically for these circuit elements.

Claims

1. A method of circuit design, comprising:

generating, by using a computer, placed, routed, and optimized circuit design, including;

placing and routing a netlist of a circuit design including a first set of circuit elements, the first set of circuit elements including instances of circuit element types; and

optimizing at least part of the first set of circuit elements,

wherein the placed, routed, and optimized circuit design obeys rules specifying positioning of each circuit element of the first set of circuit elements relative to other circuit elements of the first set of circuit elements, and the rules were created after creating the first set of circuit elements,

wherein the netlist of the circuit design further includes additional sets of circuit elements of the circuit design, and the placed, routed, and optimized circuit design obeys additional rules specifying positioning of each circuit element of each additional set of circuit elements relative to other circuit elements within a same additional set of circuit elements, the additional rules being created specifically for the additional sets of circuit elements prior to the placing and routing of the additional sets of circuit elements, and one or more additional sets of the additional sets has one or more hierarchical relationships with one or more other additional sets of the additional sets.

2. The method of claim 1, wherein the rules were created prior to generating the placed, routed, and optimized circuit design.

3. The method of claim 1, wherein the first set of circuit elements includes at least part of one or more datapaths of the circuit design.

4. The method of claim 1, wherein the first set of circuit elements includes one or more registers of the circuit design.

5. The method of claim 1, wherein the first set of circuit elements includes one or more library elements of the circuit design.

6. The method of claim 1, wherein the optimizing maintains functionality of the circuit design and improves one or more of timing, size, congestion, and power of the circuit design.

7. The method of claim 1, wherein the optimizing includes moving one or more circuit elements of the first set of circuit elements relative to one or more other circuit elements of the first set of circuit elements.

8. The method of claim 1, wherein the optimizing includes moving the first set of circuit elements together, to a position in the circuit design.

9. The method of claim 1, wherein the rules forbid changing a position of any element of the first set of circuit elements relative to any other element of the first set of circuit elements, and the optimizing includes moving the first set of circuit elements all together, to a position in the circuit design.

10. The method of claim 1, wherein the rules identify particular circuit elements of the first set of circuit elements and specify, with rows and columns, positioning of the particular circuit elements relative to each other.

11. The method of claim 1, wherein the rules identify particular circuit elements of the first set of circuit elements and specify one or more gaps between the particular circuit elements.

12. The method of claim 1, wherein the rules identify particular circuit elements of the first set of circuit elements and specify one or more orientations of the particular circuit elements.

13. The method of claim 1, wherein the rules identify particular circuit elements of the first set of circuit elements and specify pin alignment of the particular circuit elements.

14. The method of claim 1, wherein the rules forbid removal of one or more of the first set of circuit elements.

15. The method of claim 1, wherein the rules specify positioning of one or more circuit elements of the first set of circuit elements relative to a design area of the circuit design.

16. The method of claim 1, wherein the rules specify removal of empty space between one or more circuit elements of the first set of circuit elements.

17. The method of claim 1, wherein the rules were created by a human involved in creating the circuit design.

18. The method of claim 1, wherein the rules were created automatically by a computer analyzing the circuit design.

19. The method of claim 1, further comprising:

creating the rules.

20. The method of claim 1, further comprising:

creating the rules prior to generating the placed, routed, and optimized circuit design.

21. The method of claim 1, further comprising:

after said generating, modifying the rules; and

repeating the generating based on the modified rules.

22. The method of claim 1, further comprising:

after said generating, modifying the netlist; and

repeating the generating based on the modified rules.

23. The method of claim 1, wherein the netlist of the circuit design further includes a second set of circuit elements of the circuit design unconstrained by the rules.

24. The method of claim 1, wherein the netlist of the circuit design further includes a second set of circuit elements of the circuit design unconstrained by the rules, and the second set of circuit elements includes one or more of a macro, a memory, and random logic of the circuit design.

25. The method of claim 1, wherein the netlist of the circuit design further includes a second set of circuit elements of the circuit design unconstrained by the rules, and said placing and routing randomly places a second set of circuit elements in the circuit design

26. The method of claim 1, wherein the netlist of the circuit design further includes a second set of circuit elements of the circuit design unconstrained by the rules, and the generating further includes optimizing at least part of the second set of circuit elements of the circuit design.

27. The method of claim 1, wherein the netlist of the circuit design further includes a second set of circuit elements of the circuit design unconstrained by the rules, and the generating further includes optimizing at least part of the second set of circuit elements, and the optimizing of the first set of circuit elements is affected by the optimizing of the second set of circuit elements.

28. The method of claim 1, wherein the netlist of the circuit design further includes a second set of circuit elements of the circuit design unconstrained by the rules, and the generating further includes optimizing at least part of the second set of circuit elements, and the optimizing of the second set of circuit elements is affected by the optimizing of the first set of circuit elements.

29. The method of claim 1, wherein the netlist of the circuit design further includes a second set of circuit elements of the circuit design, and the placed, routed, and optimized circuit design obeys additional rules specifying positioning of each circuit element of the second set of circuit elements relative to other circuit elements of the second set of circuit elements, the additional rules being created specifically for the second set of circuit elements prior to the placing and routing of the second set of circuit elements, and the generating further includes optimizing at least part of the second set of circuit elements.

30. A computer readable medium with computer readable instructions for circuit design, comprising:

computer instructions generating a placed, routed, and optimized circuit design, including;

computer instructions placing and routing a netlist of a circuit design including a first set of circuit elements, the first set of circuit elements including instances of circuit element types; and

computer instructions optimizing at least part of the first set of circuit elements,

wherein the placed, routed, and optimized circuit design obeys rules specifying positioning of each circuit element of the first set of circuit elements relative to other circuit elements of the instances of the circuit element types, such that the rules do not apply to other instances of the circuit element types,

wherein the computer readable medium is any of a hard disk, an optical drive, and a removable media cartridge.

31. The method of claim 30, wherein the rules were created prior to executing the computer instructions generating the placed, routed, and optimized circuit design.

32. A computer readable storage device storing a computer readable program executable by a computer to perform a circuit design comprising:

a placed, routed, and optimized circuit design, wherein the placed, routed, and optimized circuit design is created by;

placing and routing a netlist of the circuit design including a first set of circuit elements, the first set of circuit elements including instances of circuit element types; and

optimizing at least part of the first set of circuit elements,

wherein the placed, routed, and optimized circuit design obeys rules specifying positioning of each circuit element of the first set of circuit elements relative to other circuit elements of the instances of the circuit element types, such that the rules do not apply to other instances of the circuit element types.

33. The method of claim 32, wherein the rules were created prior to the placing and routing and the optimizing.

34. An electrical circuit, comprising:

circuitry including a placed, routed, and optimized circuit, wherein the placed, routed, and optimized circuit was designed by;

placing and routing a netlist of the circuit including a first set of circuit elements, the first set of circuit elements including instances of circuit element types; and

optimizing at least part of the first set of circuit elements,

wherein the placed, routed, and optimized circuit obeys rules specifying positioning of each circuit element of the first set of circuit elements relative to other circuit elements of the instances of the circuit element types, such that the rules do not apply to other instances of the circuit element types.

35. The method of claim 34, wherein the rules were created prior to the placing and routing and the optimizing.