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Wafer level edge stacking

  • US 20090316378A1
  • Filed: 06/15/2009
  • Published: 12/24/2009
  • Est. Priority Date: 06/16/2008
  • Status: Active Grant
First Claim
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1. A microelectronic assembly, comprising:

  • a first microelectronic device and a second microelectronic device, each of the microelectronic devices including a die structure including at least one semiconductor die and each of the microelectronic devices having a first surface, a second surface remote from the first surface and at least one edge surface extending at angles other than a right angle away from the first and second surfaces, and at least one electrically conductive element extending along the first surface onto at least one of the edge surfaces and onto the second surface, the at least one conductive element of the first microelectronic device being conductively bonded to the at least one conductive element of the second microelectronic device to provide an electrically conductive path therebetween.

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