PACKET SWITCHING

• US 20090316711A1
• Filed: 06/24/2008
• Published: 12/24/2009
• Est. Priority Date: 06/24/2008
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: King, Steven R., Memon, Mazhar I.
• Granted Patent: US 8,031,606 B2
• Time in Patent Office: Days
• US Class Current: 370/412
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/24 Traffic characterised by specific attributes, e.g. priority or QoS
• CPC Class Codes: H04L 47/2433 Allocation of priorities to traffic types
• CPC Class Codes: H04L 47/2475 for supporting traffic characterised by the type of applications
• CPC Class Codes: H04L 47/2483 involving identification of individual flows
• CPC Class Codes: H04L 47/32 by discarding or delaying data units, e.g. packets or frames
• CPC Class Codes: H04L 47/50 Queue scheduling
• CPC Class Codes: H04L 47/6255 queue load conditions, e.g. longest queue first
• CPC Class Codes: H04L 47/627 policing
• CPC Class Codes: H04L 49/109 Integrated on microchip, e.g. switch-on-chip

Abstract

In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.

Claims

1. An apparatus comprising:

an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet, determination of the action being based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information, the switch circuitry being to examine, at least in part, the policy information to determine, at least in part, whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information, and if the switch circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry being to request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.

2. The apparatus of claim 1, wherein:

if the switch circuitry determines, at least in part, that the previously-established policy has not been established, the switch circuitry is also to place the packet in a queue and increment a counter indicating, at least in part, a number of packets in the flow that are in the queue; and

after the packet has been placed in the queue, the switch circuitry also is to re-examine, at least in part, the policy information to determine, at least in part, whether the new packet processing policy has been established.

3. The apparatus of claim 1, wherein:

the processor executes, at least in part, the at least one module;

a host processor comprises the processor;

an integrated circuit chip comprises the integrated circuit; and

the integrated circuit chip also comprises a network interface controller and the host processor.

4. The apparatus of claim 1, wherein:

the processor executes, at least in part, the at least one module;

an integrated circuit chip comprises the processor; and

another integrated circuit chip comprises the integrated circuit.

5. The apparatus of claim 1, wherein:

the policy information indicates, at least in part, the action; and

the action comprises one of placing the packet in a virtual machine queue and dropping the packet.

6. The apparatus of claim 5, wherein:

if the switch circuitry determines, at least in part, that the previously-established policy has been established, the switch circuitry is to carry out, at least in part, the action.

19. The apparatus of claim 1, wherein:

the switch circuitry is to place the packet in a queue if at least one other packet from the flow is also in the queue.

7. A method comprising:

determining, at least in part from a packet, flow information;

determining at least in part by switch circuitry comprised in an integrated circuit an action to be executed involving the packet, the determining, at least in part, of the action being based, at least in part, upon the flow information and packet processing policy information, the packet processing policy information being determined based at least in part upon examining, at least in part, by the switch circuitry of the packet processing policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information, and if the switch circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry being to request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.

8. The method of claim 7, wherein:

if the switch circuitry determines, at least in part, that the previously-established policy has not been established, the switch circuitry is also to place the packet in a queue and increment a counter indicating, at least in part, a number of packets in the flow that are in the queue; and

after the packet has been placed in the queue, the switch circuitry also is to re-examine, at least in part, the policy information to determine, at least in part, whether the new packet processing policy has been established.

9. The method of claim 7, wherein:

the processor executes, at least in part, the at least one module;

a host processor comprises the processor;

an integrated circuit chip comprises the integrated circuit; and

the integrated circuit chip also comprises a network interface controller and the host processor.

10. The method of claim 7, wherein:

the processor executes, at least in part, the at least one module;

an integrated circuit chip comprises the processor; and

another integrated circuit chip comprises the integrated circuit.

11. The method of claim 7, wherein:

the policy information indicates, at least in part, the action; and

the action comprises one of placing the packet in a virtual machine queue and dropping the packet.

12. The method of claim 11, wherein:

if the switch circuitry determines, at least in part, that the previously-established policy has been established, the switch circuitry is to carry out, at least in part, the action.

13. Machine-readable memory storing one or more instructions that when executed by a machine result in execution of operations comprising:

determining, at least in part from a packet, flow information;

determining at least in part by switch circuitry comprised in an integrated circuit an action to be executed involving the packet, the determining, at least in part, of the action being based, at least in part, upon the flow information and packet processing policy information, the packet processing policy information being determined based at least in part upon examining, at least in part, by the switch circuitry of the packet processing policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information, and if the switch circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry being to request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.

14. The memory of claim 13, wherein:

if the switch circuitry determines, at least in part, that the previously-established policy has not been established, the switch circuitry is also to place the packet in a queue and increment a counter indicating, at least in part, a number of packets in the flow that are in the queue; and

after the packet has been placed in the queue, the switch circuitry also is to re-examine, at least in part, the policy information to determine, at least in part, whether the new packet processing policy has been established.

15. The memory of claim 13, wherein:

the processor executes, at least in part, the at least one module;

a host processor comprises the processor;

an integrated circuit chip comprises the integrated circuit; and

the integrated circuit chip also comprises a network interface controller and the host processor.

16. The memory of claim 13, wherein:

the processor executes, at least in part, the at least one module;

an integrated circuit chip comprises the processor; and

another integrated circuit chip comprises the integrated circuit.

17. The memory of claim 13, wherein:

the policy information indicates, at least in part, the action; and

the action comprises one of placing the packet in a virtual machine queue and dropping the packet.

18. The memory of claim 17, wherein:

if the switch circuitry determines, at least in part, that the previously-established policy has been established, the switch circuitry is to carry out, at least in part, the action.

20. The memory of claim 13, wherein:

the switch circuitry is to place the packet in a queue if at least one other packet from the flow is also in the queue.