HARDWARE ACCELERATION FOR WWAN TECHNOLOGIES
First Claim
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1. A method of deciphering packetized data in a telecommunications signal with a hyper framer number (HFN), comprising:
- determining the HFN;
testing for a mismatched HFN, wherein if a mismatched HFN is detected,reconstructing data that was deciphered with the mismatched HFN;
deciphering the data using a correct HFN; and
copying the deciphered data to an external memory after the correct HFN is utilized, where a reduction in copying data to the external memory is achieved when a mismatched HFN is detected.
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Abstract
Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a destination process, and Keystream bank processing among other hardware acceleration features. Such systems and methods are provided to simplify logic designs and mitigate processing steps during wireless network data processing.
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Citations
42 Claims
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1. A method of deciphering packetized data in a telecommunications signal with a hyper framer number (HFN), comprising:
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determining the HFN; testing for a mismatched HFN, wherein if a mismatched HFN is detected, reconstructing data that was deciphered with the mismatched HFN; deciphering the data using a correct HFN; and copying the deciphered data to an external memory after the correct HFN is utilized, where a reduction in copying data to the external memory is achieved when a mismatched HFN is detected. - View Dependent Claims (2, 3)
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4. A processor capable of deciphering packetized data in a telecommunications signal with a hyper framer number (HFN), capable of executing instructions for:
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determining the HFN; testing for a mismatched HFN, wherein if a mismatched HFN is found, reconstructing data that was deciphered with the mismatched HFN; deciphering the data using a correct HFN; and
copying the deciphered data to an external memory after the correct HFN is utilized, where a reduction in copying data to the external memory is achieved when a mismatched HFN is detected. - View Dependent Claims (5)
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6. A computer program product, comprising:
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a computer readable medium that includes code for deciphering packetized data in a telecommunications signal with a hyper framer number (HFN), the code comprising; code for causing a computer to determine the HFN; code for causing a computer to test for a mismatched HFN, wherein if a mismatched HFN is found, code for causing a computer to reconstruct data that was deciphered with the mismatched HFN; and code for causing a computer to decipher the data using a correct HFN; and
copying the deciphered data to an external memory after the correct HFN is utilized, where a reduction in copying data to the external memory is achieved when a mismatched HFN is detected. - View Dependent Claims (7)
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8. A method of increasing the performance of a telecommunications device by managing interrupts to its modem processor while processing packetized data, comprising:
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receiving packetized data; storing at least one of a time and data volume-based threshold with respect to the received packetized data; initiating a software interrupt to the modem processor when the packetized data ready to be processed by software exceeds at least one of the time and data volume-based thresholds; and accumulating the packetized data if no interrupt is initiated, and adjusting at least the time and data volume-based thresholds, in order to reduce frequency of interrupts. - View Dependent Claims (9)
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10. A processor capable of increasing the performance of a telecommunications device by managing interrupts to its modem processor while processing packetized data, capable of executing instructions for:
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receiving packetized data; storing at least one of a time and data thresholds with respect to the received packetized data; initiating a software interrupt to the modem processor when the packetized data ready to be processed by software exceeds at least one of the time and data thresholds; and
accumulating the packetized data if no interrupt is initiated, where adjusting at least the time and data thresholds, frequency of interrupts are reduced. - View Dependent Claims (11)
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12. A computer program product, comprising:
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a computer readable medium the includes code for increasing the performance of a telecommunications device by managing interrupts to its modem processor while processing packetized data, the code comprising; code for causing a computer to receive packetized data; code for causing a computer to store at least one of a time and data volume-based threshold with respect to the received packetized data; code for causing a computer to initiate a software interrupt to the modem processor when the packetized data ready to be processed by software exceeds at least one of the time and data volume-based thresholds; and code for causing a computer to accumulate the packetized data if no interrupt is initiated, where adjusting at least the time and data volume-based thresholds, frequency of interrupts are reduced. - View Dependent Claims (13)
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14. A method of obtaining efficiencies in processing of functions in a telecommunications device by grouping functions germane to telecommunications processing of packetized data, comprising:
grouping functions relating to at least one of ciphering, deciphering, high-level data link control (HDLC) framing, checksum calculations, and protocol header insertion; and
performing the functions as a group, where bus activity is reduced as compared to performing the functions on a non-group basis.- View Dependent Claims (15, 16, 17, 18)
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19. A processor capable of obtaining efficiencies in processing of functions in a telecommunications device by grouping functions germane to telecommunications processing of packetized data, capable of executing instructions for:
grouping functions relating to at least one of ciphering, deciphering, framing, checksum calculations, and protocol header insertion; and
performing the functions as a group, where bus activity is reduced as compared to performing the functions on a non-group basis.- View Dependent Claims (20)
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21. A computer program product, comprising:
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a computer readable medium that includes code for obtaining efficiencies in processing of functions in a telecommunications device by grouping functions germane to telecommunications processing of packetized data, the code comprising; code for causing a computer to group functions relating to at least one of ciphering, deciphering, framing, checksum calculations, and protocol header insertion; and
performing the functions in group, where bus activity is reduced as compared to performing the functions on a non-group basis. - View Dependent Claims (22)
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23. A method of providing buffers for a hardware accelerator in a telecommunications device for packetized data, comprising:
providing a dynamic pool of buffers for use by the hardware accelerator, where access to the pool of buffers is controlled by software in the telecommunications device, where the software dynamically adjusts the pool of buffers according to hardware needs indicated by at least one of status signals from the hardware and threshold information on the pool of buffers, where buffers in the pool are replenished via software control. - View Dependent Claims (24)
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25. A processor capable providing buffers for a hardware accelerator in telecommunications device for packetized data, capable of executing instructions for:
providing a dynamic pool of buffers for use by the hardware accelerator, where access to the pool of buffers is controlled by software in the telecommunications device, where the software dynamically adjusts the pool of buffers according to hardware needs indicated by at least one of status signals from the hardware and threshold information on the pool of buffers, where buffers in the pool are replenished via software control. - View Dependent Claims (26)
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27. A computer program product, comprising:
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a computer readable medium that includes code for a hardware accelerator in a telecommunications device for packetized data, the code comprising; code for causing a computer to provide a dynamic pool of buffers for use by the hardware accelerator, where access to the pool of buffers is controlled by software in the telecommunications device, where the software dynamically adjusts the pool of buffers according to hardware needs indicated by at least one of status signals from the hardware and threshold information on the pool of buffers, where buffers in the pool are replenished via software control. - View Dependent Claims (28)
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29. An apparatus capable providing buffers for a hardware accelerator in a telecommunications device for packetized data, comprising:
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means for providing a dynamic pool of buffers for use by the hardware accelerator, where access to the pool of buffers is controlled by the means for providing in the telecommunications device; and means for dynamically adjusting the pool of buffers according to hardware needs indicated by at least one of status signals from the hardware and threshold information on the pool of buffers, where buffers in the pool are replenished via the means for providing. - View Dependent Claims (30)
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31. A method for reducing duplicate copies of data during read and write operations between target and source modules in a telecommunications device for packetized data, comprising:
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signaling a target module by a source module in the telecommunications device that data is to be copied to the target module; sending a target-specific structure by the target module to the source module; receiving the target-specific structure by the source module; populating data into the target-specific structure by the source module; and receiving the target-specific populated data by the target module, where one copy of data having the target-specific structure is created. - View Dependent Claims (32)
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33. A processor capable of reducing duplicate copies of data during read and write operations between target and source modules in a telecommunications device for packetized data, capable of executing instructions for:
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signaling a target module by a source module in the telecommunications device that data is to be copied to the target module; sending a target-specific structure by the target module to the source module; receiving the target-specific structure by the source module; populating data into the target-specific structure by the source module; and receiving the target-specific populated data by the target module, where one copy of data having the target-specific structure is created. - View Dependent Claims (34)
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35. A computer program product, comprising:
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a computer readable medium that includes code for reducing duplicate copies of data during read and write operations between target and source modules in a telecommunications device for packetized data, the code comprising; code for causing a computer to signal a target module by a source module in the telecommunications device that data is to be copied to the target module; code for causing a computer to send a target-specific structure by the target module to the source module; code for causing a computer to receive the target-specific structure by the source module; code for causing a computer to populate data into the target-specific structure by the source module; and code for causing a computer to receive the target-specific populated data by the target module, where one copy of data having the target-specific structure is created. - View Dependent Claims (36)
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37. A method of reducing data moves for a keystream generation in a telecommunications device, comprising:
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programming ciphering parameters to hardware; pre-computing keystreams for a number of packets in advance by the hardware;
storing the pre-computed keystreams in a bank; andproviding a suitable keystream for data flow to software, where the bank of keystreams is tested for keystream sufficiency when a keystream is requested by software, where processing overhead to program additional keystreams is minimized by use of the pre-computed keystreams. - View Dependent Claims (38)
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39. A processor capable of reducing data moves for a keystream generation in a telecommunications device, capable of executing instructions for:
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programming ciphering parameters to hardware; pre-computing keystreams for a number of packets in advance by the hardware; storing the pre-computed keystreams in a bank; and providing a suitable keystream for data flow to software, where the bank of keystreams is tested for keystream sufficiency when a keystream is requested by software, where processing overhead to program additional keystreams is minimized by use of the pre-computed keystreams. - View Dependent Claims (40)
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41. A computer program product, comprising:
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a computer readable medium that includes code for reducing data moves for a keystream generation in a telecommunications device, the code comprising; code for causing a computer to program ciphering parameters to hardware; code for causing a computer to pre-compute keystreams for a number of packets in advance by the hardware; code for causing a computer to store the pre-computed keystreams in a bank; and code for causing a computer to provide a suitable keystream for data flow to software, where the bank of keystreams is tested for keystream sufficiency when a keystream is requested by software, where processing overhead to program additional keystreams is minimized by use of the pre-computed keystreams. - View Dependent Claims (42)
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Specification