THIN FILM TRANSISTOR, SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

• US 20090321743A1
• Filed: 06/24/2009
• Published: 12/31/2009
• Est. Priority Date: 06/27/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, DAIRIKI, Koji, MIYAIRI, Hidekazu, JINBO, Yasuhiro, ISA, Toshiyuki, TEZUKA, Sachiaki
• Granted Patent: US 8,513,664 B2
• Time in Patent Office: Days
• US Class Current: 257/66
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A thin film transistor includes, as a buffer layer, an amorphous semiconductor layer having nitrogen or an NH group between a gate insulating layer and source and drain regions and at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

Claims

1. A thin film transistor comprising:

a gate insulating layer which covers a gate electrode over a substrate having an insulating surface;

a first semiconductor layer which is in contact with the gate insulating layer;

a second semiconductor layer which is stacked over the first semiconductor layer; and

impurity semiconductor layers forming a source region and a drain region which are in contact with part of the second semiconductor layer,

wherein the second semiconductor layer comprises an amorphous semiconductor layer having an NH group or an NH₂ group.

2. The thin film transistor according to claim 1, wherein different semiconductor atoms included in the second semiconductor layer are cross-linked with the NH group.

3. The thin film transistor according to claim 1, wherein different dangling bonds in semiconductor atoms included in the second semiconductor layer are terminated with the NH₂ group.

4. The thin film transistor according to claim 1, wherein the first semiconductor layer is a microcrystalline semiconductor layer.

5. The thin film transistor according to claim 1, wherein the first semiconductor layer is a dispersed microcrystalline semiconductor layer or a net-like microcrystalline semiconductor layer.

6. The thin film transistor according to claim 1, wherein an oxygen concentration of the second semiconductor layer which is measured by secondary ion mass spectrometry is less than or equal to 5×

10¹⁸ cm<sup>−

3</sup>.

13. The thin film transistor according to claim 1 or claim 7, wherein an NH group is included in the impurity semiconductor layers forming the source region and the drain region.

7. A thin film transistor comprising:

a gate insulating layer which is in contact with a gate electrode over a substrate having an insulating surface;

a semiconductor layer which is in contact with the gate insulating layer;

impurity semiconductor layers forming a source region and a drain region; and

a buffer layer which is formed between the semiconductor layer and the impurity semiconductor layers,

wherein the buffer layer comprises an amorphous semiconductor layer having an NH group or an NH₂ group.

8. The thin film transistor according to claim 7, wherein different semiconductor atoms included in the buffer layer are cross-linked with the NH group.

9. The thin film transistor according to claim 7, wherein different dangling bonds in semiconductor atoms included in the buffer layer are terminated with the NH₂ group.

10. The thin film transistor according to claim 7, wherein the semiconductor layer is a microcrystalline semiconductor layer.

11. The thin film transistor according to claim 7, wherein the semiconductor layer is a dispersed microcrystalline semiconductor layer or a net-like microcrystalline semiconductor layer.

12. The thin film transistor according to claim 7, wherein an oxygen concentration of the buffer layer which is measured by secondary ion mass spectrometry is less than or equal to 5×

10¹⁸ cm<sup>−

3</sup>.

14. A semiconductor device comprising:

a thin film transistor comprising;

a gate insulating layer which covers a gate electrode over a substrate having an insulating surface;

a first semiconductor layer which is in contact with the gate insulating layer;

a second semiconductor layer which is stacked over the first semiconductor layer; and

impurity semiconductor layers forming a source region and a drain region which are in contact with part of the second semiconductor layer,

wherein the second semiconductor layer comprises an amorphous semiconductor layer having an NH group or an NH₂ group.

15. An electronic device having the semiconductor device according to claim 14,

wherein the electronic device is selected from the group consisting of a television device, a cellular phone, a portable computer, and a desk lamp.