Structure and Method for Forming a Shielded Gate Trench FET with an Inter-Electrode Dielectric Having a Nitride Layer Therein
First Claim
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1. A shielded gate field effect transistor (FET), comprising:
- a plurality of trenches extending into a semiconductor region;
a shield electrode in a bottom portion of each trench;
a gate electrode over the shield electrode; and
an inter-electrode dielectric (IED) extending between the shield electrode and the gate electrode, the IED comprising;
(i) a first oxide layer, and(ii) a nitride layer over the first oxide layer.
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Abstract
A shielded gate field effect transistor (FET) comprises a plurality of trenches extending into a semiconductor region. A shield electrode is disposed in a bottom portion of each trench, and a gate electrode is disposed over the shield electrode in each trench. An inter-electrode dielectric (IED) extends between the shield electrode and the gate electrode. The IED comprises a first oxide layer and a nitride layer over the first oxide layer.
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Citations
36 Claims
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1. A shielded gate field effect transistor (FET), comprising:
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a plurality of trenches extending into a semiconductor region; a shield electrode in a bottom portion of each trench; a gate electrode over the shield electrode; and an inter-electrode dielectric (IED) extending between the shield electrode and the gate electrode, the IED comprising; (i) a first oxide layer, and (ii) a nitride layer over the first oxide layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A shielded gate field effect transistor (FET), comprising:
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a plurality of trenches extending into a semiconductor region; a shield electrode in a bottom portion of each trench; a gate electrode over the shield electrode; and an inter-electrode dielectric (IED) extending between the shield electrode and the gate electrode, the IED comprising; (i) a first oxide layer, and (ii) a nitride layer over the first oxide layer, wherein the nitride layer laterally extends between the shield electrode and the gate electrode, the nitride layer having outer portions that extend downward. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A method for forming a shielded gate field effect transistor (FET), the method comprising:
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forming a plurality of trenches in a semiconductor region; forming a shield electrode in a bottom portion of each trench; forming a dielectric layer comprising a first oxide layer and a nitride layer both laterally extending over the shield electrode; and forming a gate electrode over the dielectric layer. - View Dependent Claims (26, 27, 28, 29, 30, 31)
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32. A method for forming a shielded gate field effect transistor (FET), the method comprising:
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forming a plurality of trenches in a semiconductor region; forming a shield dielectric lining opposing sidewalls and bottom of each trench; forming a shield electrode in a bottom portion of each trench over the shield dielectric; recessing the shield dielectric below a top surface of the shield electrode so as to form recesses between an upper portion of the shield electrode and the semiconductor region; forming a nitride layer over the shield electrode in each trench, the nitride layer partially filling the recesses; and forming a gate electrode in an upper portion of each trench over the nitride layer. - View Dependent Claims (33, 34, 35, 36)
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Specification