SYSTEM AND METHOD FOR ACTIVE DIPLEXERS

• US 20090327384A1
• Filed: 06/27/2008
• Published: 12/31/2009
• Est. Priority Date: 06/27/2008
• Status: Active Grant

• Current Assignee: MaxLinear Communications, LLC (f/k/a Entropic Communications, LLC) (Maxlinear Incorporated)
• Original Assignee: Entropic Communications Incorporated (Maxlinear Incorporated)
• Inventors: PETROVIC, BRANISLAV
• Granted Patent: US 8,412,759 B2
• Time in Patent Office: Days
• US Class Current: 708/300
• CPC Class Codes: H04B 1/036 Cooling arrangements
• CPC Class Codes: H04B 1/109 by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input

Abstract

The present invention relates to methods and systems for signal filtering in electronic devices and more particularly, some embodiments related to methods and systems for filtering of radio frequency (RF) signals. In some embodiments, a filter circuit may comprise a down-converter, a filter, coupled to the down-converter and configured to filter the down-converted signal, and an up-converter, coupled to the filter. Various embodiments might also include a combining circuit, coupled to the up-converter and configured to combine the filtered, up-converted signal and the input signal.

Claims

1. A filter circuit comprising:

a down-converter including I and Q mixers;

a calculus operator circuit, coupled to the down-converter and configured to filter the down-converted signal;

an up-converter including I and Q mixers, coupled to the calculus operator circuit; and

a combining circuit, coupled to the up-converter and configured to combine the filtered, up-converted signal and the input signal.

2. The filter circuit of claim 1, wherein the calculus operator circuit comprises an integrator circuit.

3. The filter circuit of claim 1, wherein the calculus operator circuit comprises a differentiator circuit.

4. The filter circuit of claim 1, wherein the local oscillator signal is advanced by a phase shift φ

°

relative to the output of the local oscillator.

5. The filter circuit of claim 1, wherein the center frequency is tunable and the bandwidth is adjustable.

6. The filter circuit of claim 1, wherein the calculus operator circuit comprises a cascade of integrators.

7. The filter circuit of claim 1, wherein the calculus operator circuit comprises a cascade of differentiators.

8. The filter circuit of claim 1, further comprising an additional filter cascaded to the first filter by coupling the input of the second filter to the output of the output of the first filter.

9. The filter circuit of claim 1, wherein the filter comprises a digital filter.

36. The filter circuit of claim 1, wherein the calculus operator circuit comprises an integrator circuit.

37. The filter circuit of claim 1, wherein the calculus operator circuit comprises a differentiator circuit.

10. A circuit comprising:

a down-converter including I and Q mixers;

a filter, coupled to the down-converter and configured to filter the down-converted signal;

a phase advance circuit coupled to the filter and configured to change the phase of a filtered signal relative to the filtered down-converted signal;

an up-converter including I and Q mixers, coupled to the phase advance circuit; and

a combining circuit, coupled to the up-converter and configured to combine the filtered, up-converted signal and the input signal.

11. The circuit of claim 11, further comprising a calculus operator, coupled to the down-converted and the phase advance circuit and configured to filter the down-converted signal.

14. The circuit of claim 11, further comprising an additional filter cascaded to the first filter by coupling the input of the second filter to the output of the first filter.

15. The circuit of claim 11, wherein the filter comprises a digital filter.

12. The circuit of claim 12, wherein the calculus operator circuit comprises an integrator circuit.

13. The circuit of claim 12, wherein the calculus operator circuit comprises a differentiator circuit.

16. A method of filtering comprising:

performing a direct frequency down-conversion of an input signal;

filtering the down-converted signal using a phase advance element;

up-converting the signal back to the original frequency; and

combining the up-converted signal in phase opposition with the input signal.

17. The method of claim 17, wherein the filtering comprises using an integrator to filter the down-converted signal.

18. The method of claim 17, wherein the filtering comprises using a differentiator to filter the down-converted signal.

19. The method of claim 17, further comprising inserting a phase advance circuit into a mixer path.

20. The method of claim 17, wherein the filtering comprises cascading a series of integrators.

21. The method of claim 17, wherein the filtering comprises cascading a series of differentiators.

22. The method of claim 17, further comprising cascading a series of filter circuits.

23. The method of claim 17, wherein the filtering comprises using a digital filter.

24. An active diplexer comprising:

a first circuit including;

a down-converter;

a filter, coupled to the down-converter and configured to filter the down-converted signal, the filter further comprising a phase advance circuit;

an up-converter, coupled to the filter; and

a combining circuit, coupled to the up-converter and configured to combine the filtered, up-converted signal and the input signal; and

a second circuit coupled to the first circuit.

25. The active diplexer of claim 25, wherein the filter comprises a calculus circuit.

26. The active diplexer of claim 25, wherein the second circuit comprises a filter including a phase advance circuit.

27. The active diplexer of claim 25, wherein the second circuit comprises an active filter.

28. The active diplexer of claim 25, wherein the second circuit comprises a passive filter.

29. The active diplexer of claim 25, wherein the second circuit comprises a lower order filter.

30. The active diplexer of claim 25, wherein the second circuit comprises a band-stop filter.

31. A filter circuit comprising:

a down-converter including I and Q mixers;

a digital filter circuit, coupled to the down-converter and configured to filter the down-converted signal;

an up-converter including I and Q mixers, coupled to the calculus operator circuit; and

a combining circuit, coupled to the up-converter and configured to combine the filtered, up-converted signal and the input signal.

32. The filter circuit of claim 32, wherein the calculus operator circuit comprises an integrator circuit.

33. The filter circuit of claim 32, wherein the calculus operator circuit comprises a differentiator circuit.

34. A circuit comprising:

a filter circuit including;

a down-converter including I and Q mixers;

a calculus operator circuit, coupled to the down-converter and configured to filter the down-converted signal;

an up-converter including I and Q mixers, coupled to the calculus operator circuit; and

a combining circuit, coupled to the up-converter and configured to combine the filtered, up-converted signal and the input signal; and

a feed forward circuit coupled to the filter and configured to provide a feed forward signal to the filter.

35. The circuit of claim 35, wherein the feed forward signal is coupled to the filter circuit through a diplexer.