Flash Sector Seeding to Reduce Program Times

• US 20090327578A1
• Filed: 06/25/2008
• Published: 12/31/2009
• Est. Priority Date: 06/25/2008
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Qiu, Kenny N., Elliott, John C., Lucas, Gregg S., Cagno, Brian J.
• Granted Patent: US 8,219,740 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices

Abstract

A non-volatile flash memory comprises a plurality of non-volatile memories where a first non-volatile memory is pre-programmed (erased) with all ones, and at least a second non-volatile memory is pre-programmed with a seed value that takes advantage of the reduced programming time for less than six zeros. When writing (programming) a data byte, the memory system looks up the data byte in one or more seed tables to determine a portion of non-volatile memory to which the memory system may write the data byte with a reduced programming time. The memory system then records the location of the data byte in an address translation table so the data byte may be accessed.

Claims

1. A computer program product comprising a computer recordable medium having a computer readable program recorded thereon, wherein the computer readable program, when executed on a computing device, causes the computing device to:

initialize a non-volatile memory system comprising a plurality of non-volatile memory portions to be programmed with data values; and

seed one of the plurality of non-volatile memory portions to form a seeded non-volatile memory portion such that a first set of data values may be written to an unseeded non-volatile memory portion within the plurality of non-volatile memory portions with a reduced programming time and a second set of data values may be written to the seeded non-volatile memory portion with a reduced programming time.

2. The computer program product of claim 1, wherein initializing the non-volatile memory system comprises erasing the plurality of non-volatile memory portions to all one (1) bits.

3. The computer program product of claim 1, wherein seeding one of the plurality of non-volatile memory portions comprises programming the one of the plurality of non-volatile memory portions with a binary seed value having at least one zero bit.

4. The computer program product of claim 1, wherein the computer readable program further causes the computing device to:

receive a data portion to be written to the non-volatile memory system;

identify one of the plurality of non-volatile memory portions to write the data portion to; and

write the data portion to the identified one of the plurality of non-volatile memory portions such that writing the data portion comprises converting fewer than six ones to zeros.

5. The computer program product of claim 4, wherein the data portion is a data byte.

6. The computer program product of claim 4, wherein identifying one of the plurality of non-volatile memory portions to write the data byte to comprises:

looking up the data portion in one or more seed tables, wherein each of the one or more seed tables associates a set of data values with a corresponding non-volatile memory portion such that each of the set of data values may be written to the corresponding non-volatile memory portion by converting fewer than six ones to zeros.

7. The computer program product of claim 4, wherein the computer readable program further causes the computing device to:

update an address translation table to associate an address of the data portion with the identified non-volatile memory portion and a location within the non-volatile memory portion where the data portion is written.

8. The computer program product of claim 7, wherein the computer readable program further causes the computing device to:

responsive to a request to read a requested data portion from an address within the non-volatile memory system, look up an address within the address translation table to identify a non-volatile memory portion and a location within the identified non-volatile memory portion at which the requested data portion is written; and

read the requested data portion from identified non-volatile memory portion at the identified location.

9. The computer program product of claim 1, wherein the non-volatile memory system is a flash memory system and wherein the plurality of non-volatile memory portions comprises a plurality of flash memory sectors.

10. A method, in a data processing system, for flash sector seeding, the method comprising:

initializing a non-volatile memory system comprising a plurality of non-volatile memory portions to be programmed with data values; and

seeding one of the plurality of non-volatile memory portions to form a seeded non-volatile memory portion such that a first set of data values may be written to an unseeded non-volatile memory portion within the plurality of non-volatile memory portions with a reduced programming time and a second set of data values may be written to the seeded non-volatile memory portion with a reduced programming time.

11. The method of claim 10, wherein initializing the non-volatile memory system comprises erasing the plurality of non-volatile memory portions to all one (1) bits.

12. The method of claim 10, wherein seeding one of the plurality of non-volatile memory portions comprises programming the one of the plurality of non-volatile memory portions with a binary seed value having at least one zero bit.

13. The method of claim 10, further comprising:

receiving a data portion to be written to the non-volatile memory system;

identifying one of the plurality of non-volatile memory portions to write the data portion to; and

writing the data portion to the identified one of the plurality of non-volatile memory portions such that writing the data byte comprises converting fewer than six ones to zeros.

14. The method of claim 13, wherein identifying one of the plurality of non-volatile memory portions to write the data byte to comprises:

looking up the data portion in one or more seed tables, wherein each of the one or more seed tables associates a set of data values with a corresponding non-volatile memory portion such that each of the set of data values may be written to the corresponding non-volatile memory portion by converting fewer than six ones to zeros.

15. The method of claim 13, further comprising:

updating an address translation table to associate an address of the data portion with the identified non-volatile memory portion and a location within the non-volatile memory portion where the data portion is written.

16. The method of claim 10, wherein the non-volatile memory system is a flash memory system and wherein the plurality of non-volatile memory portions comprises a plurality of flash memory sectors.

17. A memory system comprising:

a controller;

a volatile memory; and

a non-volatile memory, wherein the non-volatile memory is used to store data from the volatile memory;

wherein the controller is configured to initialize a non-volatile memory system comprising a plurality of non-volatile memory portions to be programmed with data values and seed one of the plurality of non-volatile memory portions to form a seeded non-volatile memory portion such that a first set of data values may be written to an unseeded non-volatile memory portion within the plurality of non-volatile memory portions with a reduced programming time and a second set of data values may be written to the seeded non-volatile memory portion with a reduced programming time.

18. The memory system of claim 17, wherein seeding one of the plurality of non-volatile memory portions comprises programming the one of the plurality of non-volatile memory portions with a binary seed value having at least one zero bit.

19. The memory system of claim 17, wherein the controller is further configured to:

receive a data portion to be written to the non-volatile memory system;

identify one of the plurality of non-volatile memory portions to write the data portion to; and

write the data byte to the identified one of the plurality of non-volatile memory portions such that writing the data portion comprises converting fewer than six ones to zeros.

20. The memory system of claim 17, wherein the non-volatile memory system is a flash memory system and wherein the plurality of non-volatile memory portions comprises a plurality of flash memory sectors.