MEMORY DEVICE AND DATA STORING METHOD

• US 20090327586A1
• Filed: 10/27/2008
• Published: 12/31/2009
• Est. Priority Date: 06/25/2008
• Status: Abandoned Application

• Current Assignee: Silicon Motion Incorporated California (Silicon Motion)
• Original Assignee: Silicon Motion Incorporated California (Silicon Motion)
• Inventors: KUO, Wu-Chi
• Application Number:
  US12/258,700
• Publication Number:
  US 20090327586A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0638 Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7202 Allocation control and policies

Abstract

A memory device is provided, comprising a single-level memory unit, a multi-level memory unit and a control unit. The single-level memory unit comprises a first link table and stores data according to the first link table. The multi-level memory unit comprises a second link table and stores data according to the second link table. The control unit directs data which normally belongs to the single-level memory unit to the multi-level memory unit or directs data which normally belongs to the multi-level memory unit to the single-level memory unit according to a control signal.

Claims

1. A memory device for accessing data, comprising:

a single-level cell memory unit comprising a first link table, wherein the first link table records link relationships between logic addresses and physical addresses of the single-level cell memory unit;

a multi-level cell memory unit comprising a second link table, wherein the second link table records link relationships between logic addresses and physical addresses of the multi-level cell memory unit; and

a control unit selectively directing data which normally belongs to the single-level cell memory unit to the multi-level cell memory unit or directing data which normally belongs to multi-level cell memory unit to the single-level cell memory unit according to a control signal.

2. The memory device as claimed in claim 1, wherein the control unit comprises a switch thereby user manually controls the switch to transmit the control signal.

3. The memory device as claimed in claim 1, wherein the control unit receives the control signal from a host and sets up a flag as a predetermined value according to the control signal for directing data to the multi-level cell memory unit or the single-level-cell memory unit.

4. The memory device as claimed in claim 3, wherein the control signal is established by a vendor command.

5. The memory device as claimed in claim 1, wherein when the data is important data or operating system data, the control signal sets up a flag as a predetermined value for directing the important data or the operating system data to the single-level cell memory unit.

6. The memory device as claimed in claim 1, wherein when directing data which normally belongs to the multi-level cell memory unit to the single-level cell memory unit, the control unit adjusts the first link table to correspond to the physical addresses of the multi-level cell memory unit.

7. The memory device as claimed in claim 1, wherein when directing data which normally belongs to the single-level cell memory unit to the multi-level cell memory unit, the control unit adjusts the second link table to correspond to the physical addresses of the single-level cell memory unit.

8. A data storing method, comprising:

receiving a logic address and a data;

detecting a flag; and

directing the data to a single-level cell memory unit or a multi-level cell memory unit according to the flag and the logic address.

9. The data storing method as claimed in claim 8, wherein the flag is determined by a control signal and the control signal is generated by a host or user settings.

10. The data storing method as claimed in claim 8, wherein when the flag is established as a predetermined value, the data which normally belongs the multi-level cell memory is directed to be stored in the single-level cell memory.

11. The data storing method as claimed in claim 8, wherein the single-level cell memory unit comprises a first link table and the multi-level cell memory unit comprises a second link table, wherein the first link table and the second link table comprise link relationships between the logic addresses and a physical addresses of the respective cell memory units.

12. The data storing method as claimed in claim 11, wherein when the flag is established as a predetermined value, the first link table is adjusted to link to the physical address of the multi-level cell memory unit.

13. The data storing method as claimed in claim 8, wherein the flag is established by a vendor command.

14. A data storing method, comprising:

sending a control signal to establish a flag;

storing a data to a single-level cell memory unit or a multi-level cell memory unit according to the flag; and

sending the control signal to unestablish the flag.

15. The data storing method as claimed in claim 14, wherein the control signal is generated by a host or user settings.

16. The data storing method as claimed in claim 14, wherein when the flag is established as a predetermined value, the data which normally belongs to the multi-level cell memory is directed to be stored in the single-level cell memory.

17. The data storing method as claimed in claim 14, wherein the single-level cell memory unit comprises a first link table and the multi-level cell memory unit comprises a second link table, wherein the first link table and the second link table comprise link relationships between the logic addresses and a physical addresses of the respective cell memory units.

18. The data storing method as claimed in claim 17, wherein when the flag is established as a predetermined value, the first link table is adjusted to link to the physical address of the multi-level cell memory unit.

19. The data storing method as claimed in claim 14, wherein the flag is established by a vendor command.