NAND error management

• US 20090327837A1
• Filed: 06/30/2008
• Published: 12/31/2009
• Est. Priority Date: 06/30/2008
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Faber, Robert W., Trika, Sanjeev N., Royer, Robert, Coulson, Rick
• Application Number:
  US12/215,915
• Publication Number:
  US 20090327837A1
• Time in Patent Office: Days
• US Class Current: 714/763
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 2212/7209 Validity control, e.g. using flags, time stamps or sequence numbers

Abstract

Techniques to manage various errors in memory such as, e.g., NAND memory in electronic devices are disclosed. In some embodiments, erase, read, and program error handling errors are managed.

Claims

1. A method to manage read failures on an indirected, non-volatile (NV) block memory in an electronic device, comprising:

detecting an operational failure in a NV memory block;

relocating valid user data from the NV memory block associated with the operational failure to a good block;

marking the NV memory block associated with the operational failure as bad; and

updating the indirection table.

2. The method of claim 1, further comprising:

aborting queued operations to the NV memory block associated with the operational failure; and

delivering a failure status to the user for each queued operation.

3. The method of claim 1, further comprising:

stalling queued memory operations to NV memory in the electronic device;

updating queued operations to reflect the updated indirection table; and

resuming execution of queued operations to NV memory in the electronic device.

4. The method of claim 3, further comprising:

skipping updates for at least one queued read operation that targets valid data in the NV memory block associated with the operational failure.

5. The method of claim 3 further comprising:

marking as bad data associated with the NV memory block associated with the operational failure;

delivering a failure status to the user for a read failure;

delivering a failure status to the user on subsequent read operations of the marked data; and

unmarking the data as failed when the data is re-written by the user.

6. The method of claim 5, further comprising:

withholding delivery of a failure status to the user when the failing read access was not initiated by the user.

7. The method of claim 1 wherein the non-volatile memory comprises NAND memory.

8. The method of claim 7 wherein the indirection system is page-level indirection.

9. The method of claim 1, further comprising moving invalid user data.

10. The method of claim 1, wherein the read error represents a failure to correct NV data with an error correction code.

11. The method of claim 1 where the read error represents an error correction code for NV data operations which succeed with a number of corrections that exceeds a specified threshold.

12. A method to manage write failures on an indirected, non-volatile (NV) block memory in an electronic device, comprising:

detecting an operational failure in a NV memory block;

relocating valid user data from the NV memory block associated with the operational failure to a good block;

marking as bad the NV memory block associated with the operational failure; and

updating the indirection table.

13. The method of claim 12, further comprising:

stalling queued NV memory operations;

updating queued write operations that target the failed block to new use new locations and update indirection table;

updating queued read operations to reflect the updated indirection table; and

resuming execution of queued operations.

14. The method of claim 12, wherein the non-volatile memory comprises NAND memory.

15. The method of claim 12, wherein the indirection system comprises page-level indirection.

16. The method of claim 12, further comprising moving invalid user data.

17. A system, comprising:

a controller;

a non-volatile storage device; and

logic to;

manage read failures on an indirected, non-volatile (NV) block memory in an electronic device, comprising;

detect an operational failure in a NV memory block;

relocate valid user data from the NV memory block associated with the operational failure to a good block;

mark the NV memory block associated with the operational failure as bad; and

update the indirection table.

18. The system of claim 17, further comprising logic to:

abort queued operations to the NV memory block associated with the operational failure; and

deliver failure status to the user for each queued operation.

19. The system of claim 17, further comprising logic to:

stall queued memory operations to NV memory in the electronic device;

update queued operations to reflect the updated indirection table; and

resume execution of queued operations to NV memory in the electronic device.

20. The system of claim 17, further comprising logic to:

skip updates for at least one queued read operation that targets valid data in the NV memory block associated with the operational failure.