Stress-Alleviation Layer for LED Structures

• US 20100001257A1
• Filed: 07/24/2008
• Published: 01/07/2010
• Est. Priority Date: 07/02/2008
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yu, Chen-Hua, Yu, Chia-Lin, Chen, Ding-Yuan, Chiou, Wen-Chih, Lin, Hung-Ta
• Granted Patent: US 8,779,445 B2
• Time in Patent Office: Days
• US Class Current: 257/13
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/08 with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body H01L27/15 takes precedence
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

A light emitting diodes (LEDs) is presented. The LED includes a stress-alleviation layer on a substrate. Open regions and stress-alleviation layer regions are formed on the substrate. Epitaxial layers are disposed on the substrate, at least in the open regions therein, thereby forming an LED structure. The substrate is diced through at least a first portion of the stress-alleviation regions, thereby forming the plurality of LEDs.

Claims

1. A semiconductor structure, the structure comprising:

a substrate;

a stress-alleviation layer on the substrate;

open regions and stress-alleviation regions on the substrate; and

epitaxial layers on the substrate, at least in the open regions, forming LED structures therein.

2. The structure of claim 1, wherein the substrate is selected from the group consisting of Si, sapphire, SiC and GaN.

3. The structure of claim 1, wherein the stress-alleviation layer is selected from the group consisting of SiO₂, SiN, III-Nitrides, or combinations thereof.

4. The structure of claim 1, wherein the epitaxial layers comprise at least one selective epitaxy layer.

5. The structure of claim 1 further comprising:

a precursor underlying the epitaxial layers.

6. The structure of claim 5, wherein the epitaxial layers comprise an at least one non-selective epitaxial layer.

7. The structure of claim 1, wherein the stress-alleviation layer is interposed between the substrate and an epitaxial layer.

8. The structure of claim 1, wherein the stress-alleviation layer is interposed between two epitaxial layers.

9. The structure of claim 1, wherein a portion of the stress-alleviation regions form at least one stress-alleviation island, and wherein at least one of the LED structures includes the at least one stress-alleviation island.

10. The structure of claim 1 further comprising:

a reflectivity layer added to the LED structures.

11. A semiconductor structure, the structure comprising:

a substrate;

a plurality of stress-alleviation regions; and

a plurality of LED structures formed on the substrate, wherein each LED structure borders an at least one stress-alleviation region.

12. The semiconductor structure of claim 11, wherein a first portion of the plurality of stress-alleviation regions comprises a stress-alleviation layer on the substrate, and wherein a second portion of the plurality of stress-alleviation regions comprises regions open to the substrate.

13. The semiconductor structure of claim 11, wherein the plurality of LED structures border a plurality of stress-alleviation regions.

14. The semiconductor structure of claim 11, wherein a portion of the plurality of LED structures includes a stress-alleviation island, wherein a stress-alleviation island is comprised of a stress-alleviation region within an LED structure.

15. A light emitting diode (LED) comprising:

a substrate;

stress-alleviation regions;

an LED structure comprising;

a buffer layer disposed on the substrate;

a quantum-well layer; and

a top-side contact, wherein a first contact epitaxial layer is interposed between the buffer layer and the quantum-well layer, and wherein a second contact epitaxial layer is interposed between the quantum-well layer and the top-side contact, and wherein an at least one of the stress-alleviation regions borders the LED structure.

16. The LED of claim 15, wherein an at least one of the stress-alleviation regions is within the LED structure, forming a stress-alleviation island.

17. The LED of claim 15, wherein the stress-alleviation regions are disposed between the substrate and an epitaxial layer.

18. The LED of claim 15, wherein the stress-alleviation regions are disposed between two epitaxial layers.

19. The LED of claim 15, wherein the stress-alleviation regions have a thickness between about 0.1-5.0 μ

m.

20. The LED of claim 15 further comprising:

a reflectivity layer added to the LED structures.