STORAGE REGION ALLOCATION SYSTEM, STORAGE REGION ALLOCATION METHOD, AND CONTROL APPARATUS

• US 20100005233A1
• Filed: 12/06/2006
• Published: 01/07/2010
• Est. Priority Date: 12/16/2005
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Hosokawa, Kouhei
• Granted Patent: US 8,225,064 B2
• Time in Patent Office: Days
• US Class Current: 711/105
• CPC Class Codes: G06F 12/02 Addressing or allocation; Relocation program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00
• CPC Class Codes: G06F 12/0215 with look ahead addressing means
• CPC Class Codes: G06F 13/1631 through address comparison

Abstract

There are provided a memory space allocation method and a memory space allocation device that aim at higher-speed accesses when a memory is shared by a plurality of circuits. In this memory, one data is accessed by issuing addresses a plurality of times. Memory allocation is performed so that high-order addresses of memory spaces of an external memory 505 may be maximally shared by a plurality of circuits 501. When the high-order addresses are common, a memory control circuit does not transfer the high-order addresses, thereby reducing the number of transfers of the high-order addresses. Therefore, the higher-speed access is achieved.

Claims

1-25. -25. (canceled)

26. A storage region allocation system comprising:

one or a plurality of access generation means, said one or a plurality of access generation means generating at least two types of accesses in total;

access means that processes an access from said access means;

storage means that is connected to said access means and performs communication of at least two or more address specifying information to specify one address, wherein regarding said communication, communication of said address specifying information that is equal to address specifying information communicated at a preceding time may be omitted; and

calculation means that determines an occupation region in said storage means to be used by said access generation means so as to minimize an average access number to said storage means, based on an address width and a data width of a communication path between said access generation means and said access means, and a width of said address specifying information of said storage means and a data width of said storage means.

27. The storage region allocation system according to claim 26, wherein

said calculation means exhaustively enumerates allocation patterns of occupation region of said plurality of access generation means in said storage means;

and

said calculation means calculates the average access number for each of said enumerated patterns, and determines the occupation region in said storage means with the average access number being minimum among these average access numbers.

28. The storage region allocation system according to claim 26, wherein

said calculation means receives a second data width to be influenced by a one-bit write enable;

and

dividing a data width of said access generation means by said second data width, rounding up the quotient to an integer and further multiplying the integer by said second data width, and using a resulting value as a data width of said access generation means, said calculation means determines the occupation region in said storage means.

29. The storage region allocation system according to claim 28, wherein

said calculation means determines an occupation region of said access generation means in said storage means, using a region obtained by dividing the occupation region to be occupied by said access generation means by one of said address specifying information among said address specifying information and said second data width.

30. A control apparatus comprising:

the storage region allocation system according to claim 26;

input means that transmits to said calculation means an address width and a data width of a communication path between access generation means and said access means, and a width of the address specifying information of said storage means and a data width of said storage means; and

access order determination means that determines an access order so as to minimize the average access number, based on occupation region allocation determined by said calculation means and an access status of said access generation means;

said access means controlling said storage means in accordance with the access order determined by said access order determination means.

31. A control apparatus comprising:

the storage region allocation system according to claim 28;

input means that transmits to said calculation means an address width and a data width of a communication path between said access generation means and said access means, a width of said address specifying information of said storage means and a data width of said storage means, and a data width to be influenced by the one-bit write enable; and

access order determination means that determines an access order so as to minimize an average access number, based on occupation region allocation determined by said calculation means and an access status of said access generation means;

said access means controlling accesses to said storage means in accordance with the access order determined by said access order determination means.

32. The control apparatus according to claim 30, wherein

said storage means is a clock synchronous type dynamic random access memory;

and

when an access is occurred to a memory space arranged at a same row address and to be used by said access generation means, said access order determination means sequentially issues an active command one time, a read command/write command a plurality of times, and a precharge command one time to perform processing.

33. The control apparatus according to claim 30, wherein

when an access is occurred to memory arranged at a same row address and to be used by said access generation means, said access order determination means performs control so that one of write processing and read processing is brought together and is processed earlier, and then a remainder of the processing is performed next.

34. A storage region allocation method of allocating an occupation region in storage means, one or a plurality of access generation means generating at least types of accesses in total, said storage means being connected to access means for processing an access from said access generation means, at least two or more address specifying information being communicated so as to specify one address in said storage means, wherein regarding said communication, communication of address specifying information that is equal to address specifying information communicated at a preceding time may be omitted, said method comprising:

(a) a step of receiving an address width and a data width of a communication path between said access generation means and said access means;

(b) a step of receiving a width of the address specifying information of said storage means and a data width of said storage means; and

(c) a step of determining an occupation region in said storage means to be used by said access generation means so as to minimize an average access number, using the information obtained in said step (a) and step (b).

35. The storage region allocation method according to claim 34, wherein said step (c) comprises:

(c.1) a step of enumerating a plurality of patterns on allocation of an occupation region arrangement in said storage means to be used by said access generation means;

(c.2) a step of calculating an average access number for each of said patterns obtained in said step (c.1); and

(c.3) a step of determining the pattern with the average access number being minimum among the average access numbers of the respective patterns obtained in said step (c.2), as the occupation region in said storage means to be used by said access generation means.

36. The storage region allocation method according to claim 34, wherein said step (a) comprises:

(a.1) a step of receiving a second data width to be influenced by a one-bit write enable for said storage means; and

(a.2) a step of dividing the data width of said access generation means by the second data width and rounding up a resulting value of the division to an integer, further multiplying the integer by the second data width, and using a result of the multiplication as a modified data width of said access generation means.

37. The storage region allocation method according to claim 35, wherein said step (c.1) comprises:

(c.1.1) a step of dividing said storage means into occupation regions to be occupied by said access generation means using one of the address specifying information and the second data width; and

(c.1.2) a step of enumerating said patterns of combinations of the divided occupation regions obtained in said step (c.1.1) and allocation of said access generation means.

38. The storage region allocation method according to claim 37, wherein said step (c.1) comprises:

(c.1.3) a step of deleting in advance a pattern clearly having a same average access number from among said patterns enumerated in step (c.1.2); and

in said step (c.2), the average access number for said remaining patterns being obtained by deleting the pattern clearly having the same average access number from among said patterns enumerated in said step (c.1.2), is calculated.

39. A control method of controlling an access to storage means using the storage region allocation method according to claim 35, said control method comprising:

(d) a step of determining an access order based on information on occupation region allocation of said storage means to be used by said access generation means obtained in said step (c) and a status of an access from said access generation means to said storage means; and

(e) a step of controlling an access to said storage means in accordance with the access order determined in said step (d).

40. A control apparatus that controls accesses from a plurality of circuits to a sharing memory, said apparatus comprising:

calculation means that receives;

information on an address width and a data width of each of said circuits, and

information on a high-order address width, a low-order address width, and a data width of said memory, or said information and information on a data width to be influenced by a one-bit write enable for said memory, and

determines memory allocation to be allocated to said circuits so as to reduce a number of cycles to be spent for processing the access from said circuit;

access order determination means that determines an access order for said memory, based on information on accesses from said circuits and the memory allocation determined by said calculation means; and

access means that accesses to said memory in accordance with the access order determined by said access order determination means.

41. The control apparatus according to claim 40, wherein

said circuits issues address information a plurality of times when making a read access or a write access to said memory;

and

said memory is a memory in which transfer of the address information, which is the same as the address information at a preceding time, may be omitted, among the plurality of address information issued by said circuit.

42. The control apparatus according to claim 40, wherein said calculation means calculates the memory allocation for said circuits so as to minimize the access number to said memory from said circuits.

43. A program that causes a computer configuring a control apparatus that controls accesses from a plurality of circuits to a sharing memory to execute:

calculation processing of receiving

information on respective address widths and respective data widths of said circuits, and

information on a high-order address width, a low-order address width, and a data width of said memory, or said information and information on a data width to be influenced by a one-bit write enable for said memory, and

determining memory allocation to be allocated for said circuit so as to reduce a access number to be spent for processing an access from said circuit;

access order determination processing of determining an access order for said memory, based on information on the accesses from said circuits and the memory allocation determined by said calculation processing; and

access processing of accessing to said memory in accordance with the access order determined by said access order determination processing.

44. The program according to claim 43, wherein

said circuit issue address information a plurality of times when making a read access or a write access to said memory;

and

said memory is a memory in which transfer of the address information, which is the same as the address information at a preceding time, may be omitted, among the plurality of address information issued by said circuit.

45. A storage region allocation system for storage means, which determines access region allocation for access generation means, said storage means being connected to access means for processing an access from said access generation means, at least two or more address specifying information being communicated so as to specify one address in said storage means, said storage means being configured so that communication of same address specifying information specified continuously during the communication may be omitted,

wherein, when said access generation means continuously accesses in accordance with accesses from said plurality of different access generation means,

regions to be respectively accessed by a plurality of access generation means are allocated, in regions of said storage means, so that the communication of the address specifying information may be omitted.

46. A storage device connected to access means for processing an access from access generation means, at least two or more address specifying information being communicated so as to specify one address in said storage device, said storage device being configured so that communication of same address specifying information specified continuously during the communication may be omitted,

wherein, when said access generation means continuously accesses in accordance with accesses from said plurality of different access generation means,

regions to be respectively accessed by a plurality of access generation means are allocated, in regions of said storage means, so that the communication of the address specifying information may be omitted.

47. A storage region allocation system for storage means, which determines access region allocation for access generation means, said storage means being connected to access means for processing accesses from said access generation means, at least two or more address specifying information being communicated so as to specify one address in said storage means, said storage means being configured so that communication of same address specifying information specified continuously during the communication may be omitted,

wherein an occupation region in said storage region to be used by said access generation means is allocated so as to minimize an average access number to said storage means, based on address widths and data widths of said access generation means and an address width and a data width of said storage means.

48. A storage device connected to access means for processing accesses from access generation means, at least two or more address specifying information being communicated so as to specify one address in said storage device, said storage device being so configured that communication of same address specifying information specified continuously during the communication may be omitted,

wherein an occupation region in said storage region to be used by said access generation means is allocated so as to minimize an average access number to said storage means, based on address widths and data widths of said access generation means and an address width and a data width of said storage means.

49. A storage region allocation method for storage means, which determines access region allocation for access generation means, said storage means being connected to access means for processing an access from access generation means, at least two or more address specifying information being communicated so as to specify one address in said storage means, said storage means being configured so that communication of same address specifying information specified continuously during the communication may be omitted,

wherein, when said access generation means continuously accesses in accordance with accesses from said plurality of different access generation means,

regions to be respectively accessed by a plurality of access generation means are allocated, in regions of said storage means, so that the communication of the address specifying information may be omitted.

50. A storage region allocation method for storage means, which determines access region allocation for access generation means, said storage means being connected to access means for processing accesses from said access generation means, at least two or more address specifying information being communicated so as to specify one address in said storage means, said storage means being configured so that communication of same address specifying information specified continuously during the communication may be omitted,

wherein an occupation region in said storage region to be used by said access generation means is allocated so as to minimize an average access number to said storage means, based on address widths and data widths of said access generation means and an address width and a data width of said storage means.